JTAG-Anschluss

[blindesHuhn (Gast)]

Hallo zusammen

Ich baue einen kleinen/mittelgrossen Roboter und benütze für die 
Steuerung einen MAX II von Altera. Damit ich den Print fertigen kann, 
muss ich wissen wie ich den JTAG an den Chip anschliessen muss. Aus dem 
Beschrieb werde ich irgendwie nicht schlau:-( . Kann mir jemand mit 
einer Skizze oder link weiterhelfen, damit ich weiss, wo pull-up/down 
widerstände reinkommen?
Den Chip habe ich noch nicht, aber ich verwende wahrscheinlich einen MAX 
II EPM240T100C5N. Zum programmieren benutze ich den Byteblaster von 
Altera.

[JTAGER (Gast)]

Hallo,

aus einem Lattice-Dokument.
http://www.latticesemi.com/lit/docs/ispbs/ispguide.pdf?jsessionid=f0306f5fc75d9df7248c417135155c3a561f

"
Pin Connections After Programming
After programming and testing has been completed, the question often 
arises, “What should be done with the ISP
port signals?” One of the requirements in the IEEE1149.1 standard for 
the JTAG port is that both the TMS pin and
the TDI pin have internal pull-up resistors. By ensuring that there is a 
‘1’ on the TMS pin, inadvertent clocking of
TCK will not cause the JTAG state machine to leave its reset state. 
During power-up, inadvertent clocking on TCK
can cause the 1149.1 state machine and instruction register to come up 
in an undesirable state. To increase noise
immunity during power-up, the following recommendation is made:
• A 4.7KΩ pull-up resistor should be used on the TMS signal and a 4.7KΩ
pull-down resistor on the TCK signal on a board. As the number of 
devices connected to the TCK/TMS signals increases, the pull-up and 
pull-down resistor values may need to be adjusted as more internal 
pull-up resistors are affecting those signals.
For a chain with 10 devices, the pull-down resistor value on TCK should 
be 2KΩ.
"

[Andi (Gast)]

Wie wärs mit folgendem Board?
http://www.mdfly.com/index.php?main_page=product_info&products_id=425

lg