TMS320F28335 & SPIRXBUF immer FFFF

[Kill_F28335 (Gast)]

Hallo Forum,

ich versuche eine Kommunikation über SPI auf dem genannten DSP zu 
realisieren.


Wenn ich jetzt mim JTAG durchsteppe funktioniert es aber nicht..


Ich sende Daten über SPI an den DSP mein OLS zeigt das die Daten korrekt 
über die Leitung gehen.

Wenn ich nun aber im DSP folgendes mache (innerhalb einer ISR wo er auch 
hinspringt):

   rdata = SpiaRegs.SPIRXBUF;          // Read data
   SpiaRegs.SPIFFRX.bit.RXFFOVFCLR=1;  // Clear Overflow flag
   SpiaRegs.SPIFFRX.bit.RXFFINTCLR=1;  // Clear Interrupt flag

steht in rdata immer 0xFFFF.
Ich dachte es läge am JTAG, es gibt ein extra Register SPIRXEMU wenn ich 
dieses anstatt SPIRXBUF verwende kommt trotzdem immer 0xFFFF raus.

Die Initialisierung sieht so aus (sollte für SPI mit FIFO passen, 
intterrupts werden später aktiviert..):

void spi_fifo_init()
{
// Initialize SPI FIFO registers
   SpiaRegs.SPICCR.bit.SPISWRESET=0; // Reset SPI

   SpiaRegs.SPICCR.all=0x000F;       //16-bit character, CLKPOL = 0
   SpiaRegs.SPICTL.all=0x000A;       //Interrupts off, CLKPH = 1, Talk = 1
   SpiaRegs.SPISTS.all=0x0000;
   SpiaRegs.SPIBRR=0x0063;           // Baud rate UNUSED as SLAVE
   SpiaRegs.SPIFFTX.all=0xC048;      // Enable FIFO's, set TX FIFO level to 8
   SpiaRegs.SPIFFRX.all=0x4061;      // Set RX FIFO level to 1
   SpiaRegs.SPIFFCT.all=0x00;
   SpiaRegs.SPIPRI.all=0x0008;
   SpiaRegs.SPIFFTX.bit.TXFFIENA=0; //TX Interrupt off
   SpiaRegs.SPICCR.bit.SPISWRESET=1;  // Enable SPI

   SpiaRegs.SPIFFTX.bit.TXFIFO=1;
   SpiaRegs.SPIFFRX.bit.RXFIFORESET=1;
}


void InitSpiaGpio()
{

   EALLOW;


/* Enable internal pull-up for the selected pins */
// Pull-ups can be enabled or disabled by the user.  
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.

//    GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0;   // Enable pull-up on GPIO16 (SPISIMOA)
//    GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0;   // Enable pull-up on GPIO17 (SPISOMIA)
//    GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0;   // Enable pull-up on GPIO18 (SPICLKA)
//    GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0;   // Enable pull-up on GPIO19 (SPISTEA)


    GpioCtrlRegs.GPBPUD.bit.GPIO54 = 0;   // Enable pull-up on GPIO54 (SPISIMOA)
    GpioCtrlRegs.GPBPUD.bit.GPIO55 = 0;   // Enable pull-up on GPIO55 (SPISOMIA)
    GpioCtrlRegs.GPBPUD.bit.GPIO56 = 0;   // Enable pull-up on GPIO56 (SPICLKA)
    GpioCtrlRegs.GPBPUD.bit.GPIO57 = 0;   // Enable pull-up on GPIO57 (SPISTEA)

  GpioCtrlRegs.GPAPUD.bit.GPIO29 = 0;  //Debug LED pull-up on
//  GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0;   //SPI_Transfer pull-up on

  /*Direction of used GPIO*/
  GpioCtrlRegs.GPBDIR.bit.GPIO54 = 0;
  GpioCtrlRegs.GPBDIR.bit.GPIO55 = 1;
  GpioCtrlRegs.GPBDIR.bit.GPIO56 = 0;  
  GpioCtrlRegs.GPBDIR.bit.GPIO57 = 0;

/* Set qualification for selected pins to asynch only */
// This will select asynch (no qualification) for the selected pins.
// Comment out other unwanted lines.

//    GpioCtrlRegs.GPAQSEL2.bit.GPIO16 = 3; // Asynch input GPIO16 (SPISIMOA)
//    GpioCtrlRegs.GPAQSEL2.bit.GPIO17 = 3; // Asynch input GPIO17 (SPISOMIA)
//    GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3; // Asynch input GPIO18 (SPICLKA)
//    GpioCtrlRegs.GPAQSEL2.bit.GPIO19 = 3; // Asynch input GPIO19 (SPISTEA)

    GpioCtrlRegs.GPBQSEL2.bit.GPIO54 = 3; // Asynch input (SPISIMOA)
    GpioCtrlRegs.GPBQSEL2.bit.GPIO55 = 3; // Asynch input (SPISOMIA)
    GpioCtrlRegs.GPBQSEL2.bit.GPIO56 = 3; // Asynch input  (SPICLKA)
    GpioCtrlRegs.GPBQSEL2.bit.GPIO57 = 3; // Asynch input  (SPISTEA)


/* Configure SPI-A pins using GPIO regs*/
// This specifies which of the possible GPIO pins will be SPI functional pins.
// Comment out other unwanted lines.

//    GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 1; // Configure GPIO16 as SPISIMOA
//    GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 1; // Configure GPIO17 as SPISOMIA
//    GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 1; // Configure GPIO18 as SPICLKA
 //   GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1; // Configure GPIO19 as SPISTEA

    GpioCtrlRegs.GPBMUX2.bit.GPIO54 = 1; // Configure GPIO54 as SPISIMOA
    GpioCtrlRegs.GPBMUX2.bit.GPIO55 = 1; // Configure GPIO55 as SPISOMIA
    GpioCtrlRegs.GPBMUX2.bit.GPIO56 = 1; // Configure GPIO56 as SPICLKA
    GpioCtrlRegs.GPBMUX2.bit.GPIO57 = 1; // Configure GPIO57 as SPISTEA

  GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 0;// Configure GPIO1 as GPIO
  GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 0;// Configure GPIO29 as GPIO

  /*Initial State! */
  GpioDataRegs.GPACLEAR.bit.GPIO1=1;

  /*Direction of used GPIO*/
  GpioCtrlRegs.GPADIR.bit.GPIO29 = 1; //GPIO Debug_LED out
  GpioCtrlRegs.GPADIR.bit.GPIO1 = 1;  //GPIO SPI_Transfer out


    EDIS;
}