1 | *******************************************************************************
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2 | *
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3 | * MSP430 CODE EXAMPLE DISCLAIMER
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4 | *
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5 | * MSP430 code examples are self-contained low-level programs that typically
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6 | * demonstrate a single peripheral function or device feature in a highly
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7 | * concise manner. For this the code may rely on the device's power-on default
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8 | * register values and settings such as the clock configuration and care must
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9 | * be taken when combining code from several examples to avoid potential side
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10 | * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
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11 | * for an API functional library-approach to peripheral configuration.
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12 | *
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13 | * --/COPYRIGHT--*/
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14 | //******************************************************************************
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15 | // MSP430F20x2/3 Demo - SPI full-Duplex 3-wire Master
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16 | //
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17 | // Description: SPI Master communicates full-duplex with SPI Slave using
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18 | // 3-wire mode. The level on P1.4 is TX'ed and RX'ed to P1.0.
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19 | // Master will pulse slave reset for synch start.
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20 | // ACLK = n/a, MCLK = SMCLK = Default DCO
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21 | //
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22 | // Slave Master
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23 | // MSP430F20x2/3 MSP430F20x2/3
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24 | // ----------------- -----------------
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25 | // | XIN|- /|\| XIN|-
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26 | // | | | | |
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27 | // | XOUT|- --|RST XOUT|-
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28 | // | | /|\ | |
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29 | // | RST/NMI|--+<----|P1.2 |
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30 | // LED <-|P1.0 | | P1.4|<-
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31 | // ->|P1.4 | | P1.0|-> LED
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32 | // | SDI/P1.7|<-------|P1.6/SDO |
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33 | // | SDO/P1.6|------->|P1.7/SDI |
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34 | // | SCLK/P1.5|<-------|P1.5/SCLK |
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35 | //
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36 | // M. Buccini / L. Westlund
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37 | // Texas Instruments Inc.
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38 | // October 2005
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39 | // Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version: 3.40A
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40 | //******************************************************************************
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41 |
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42 | #include <msp430.h>
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43 |
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44 | int main(void)
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45 | {
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46 | volatile unsigned int i;
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47 |
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48 | WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
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49 | P1OUT = 0x10; // P1.4 set, else reset
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50 | P1REN |= 0x10; // P1.4 pullup
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51 | P1DIR = 0x01; // P1.0 output, else input
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52 | USICTL0 |= USIPE7 + USIPE6 + USIPE5 + USIMST + USIOE; // Port, SPI master
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53 | USICTL1 |= USIIE; // Counter interrupt, flag remains set
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54 | USICKCTL = USIDIV_4 + USISSEL_2; // /16 SMCLK
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55 | USICTL0 &= ~USISWRST; // USI released for operation
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56 | USISRL = P1IN; // init-load data
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57 |
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58 | P1DIR |= 0x04; // Reset Slave
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59 | P1DIR &= ~0x04;
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60 | for (i = 0xFFF; i > 0; i--); // Time for slave to ready
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61 | USICNT = 8; // init-load counter
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62 | __bis_SR_register(LPM0_bits + GIE); // Enter LPM0 w/ interrupt
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63 | }
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64 |
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65 | // USI interrupt service routine
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66 | #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
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67 | #pragma vector=USI_VECTOR
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68 | __interrupt void universal_serial_interface(void)
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69 | #elif defined(__GNUC__)
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70 | void __attribute__ ((interrupt(USI_VECTOR))) universal_serial_interface (void)
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71 | #else
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72 | #error Compiler not supported!
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73 | #endif
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74 | {
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75 | if (0x10 & USISRL)
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76 | P1OUT |= 0x01;
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77 | else
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78 | P1OUT &= ~0x01;
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79 | USISRL = P1IN;
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80 | USICNT = 8; // re-load counter
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81 | }
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