1 | /*
|
2 | * OSD_BVG_USB.c
|
3 | *
|
4 | * Created: 20.12.2015 05:36:31
|
5 | * Author : Entsörungsdienst
|
6 | */
|
7 |
|
8 | #include <avr/io.h>
|
9 | #include <stdio.h> // Einbinden der Standard I/O Ports
|
10 | #include <util/delay.h>
|
11 | #include <avr/interrupt.h>
|
12 | #include "Transfer.h"
|
13 | #include "zeichen.h"
|
14 | #include "initSPI.h"
|
15 |
|
16 | #define OSD2_Gl1_ZS1 PB7 // Zugsensor
|
17 | #define OSD2_Gl1_ZS2 PD0 // Zugsensor
|
18 | #define OSD2_Gl1_IRT PD1 // Teleskop
|
19 | #define OSD2_Gl1_DKPS PD2 // Deckelkontakt u. Personensensor
|
20 |
|
21 | #define OSD2_Gl2_ZS1 PD3 // Zugsensor
|
22 | #define OSD2_Gl2_ZS2 PD5 // Zugsensor
|
23 | #define OSD2_Gl2_IRT PD4 // Teleskop
|
24 | #define OSD2_Gl2_DKPS PD6 // Deckelkontakt u. Personensensor
|
25 |
|
26 | #define OSD2_Alarm PD7 // Ausgang für Alarm
|
27 | #define OSD2_Stoerung PB4 // Ausgang für Störungen
|
28 |
|
29 | #define OSD1_Gl1_ZS1 PF0 // Zugsensor
|
30 | #define OSD1_Gl1_ZS2 PF1 // Zugsensor
|
31 | #define OSD1_Gl1_IRT PF4 // Teleskop
|
32 | #define OSD1_Gl1_DKPS PF5 // Deckelkontakt u. Personensensor
|
33 |
|
34 | #define OSD1_Gl2_ZS1 PF6 // Zugsensor
|
35 | #define OSD1_Gl2_ZS2 PF7 // Zugsensor
|
36 | #define OSD1_Gl2_IRT PC7 // Teleskop
|
37 | #define OSD1_Gl2_DKPS PC6 // Deckelkontakt u. Personensensor
|
38 |
|
39 | #define OSD1_Alarm PB6 // Ausgang für Alarm
|
40 | #define OSD1_Stoerung PB5 // Ausgang für Störungen
|
41 |
|
42 |
|
43 |
|
44 | uint8_t POS = 0x00;
|
45 | int Haltezeit1 = 0;
|
46 | int Haltezeit2 = 0;
|
47 | int Zug = 0;
|
48 | int Zug2 = 0;
|
49 | int Bahn = 0;
|
50 | int Bahn2 = 0;
|
51 |
|
52 | void timer_init_0(void)
|
53 | {
|
54 | TIMSK0 |= (1 << TOIE0);
|
55 | sei();
|
56 | //enable interrupts
|
57 | TCCR0B |= (1 << CS01) | (1 << CS00);
|
58 | // set prescaler to 64 and start the timer
|
59 | Haltezeit1 = 0;
|
60 | }
|
61 |
|
62 |
|
63 | //NEUER TIMER MUSS NOCH OPTIMIERT WERDEN!!!!!!!!!!!!!!**********************************************************
|
64 | void timer_init_1(void)
|
65 | {
|
66 | TIMSK1 |= (1 << TOIE1);
|
67 | sei();
|
68 | //enable interrupts
|
69 | TCCR1B |= (1 << CS01) | (1 << CS00);
|
70 | // set prescaler to 64 and start the timer
|
71 | Haltezeit2 = 0;
|
72 | }
|
73 | //**************************************************************************************************************
|
74 |
|
75 | ISR(TIMER0_OVF_vect)
|
76 | {
|
77 |
|
78 | if(Zug == 1)
|
79 | {
|
80 |
|
81 | if(Bahn == 2500) //HALTEZEIT 500 ~ 1s / 5000 ~ 10s
|
82 | {
|
83 | Zug = 0;
|
84 | Bahn = 0;
|
85 | }
|
86 | Bahn++;
|
87 | }
|
88 | else
|
89 | {
|
90 | if(Haltezeit1 == 500) //HALTEZEIT 500 ~ 1s / 5000 ~ 10s
|
91 | {
|
92 | Transfer2(0x04,0x06);
|
93 | DDRD &= ~(1<<OSD2_Alarm);
|
94 | Haltezeit1 = 0;
|
95 | }
|
96 | Haltezeit1++;
|
97 | }
|
98 | }
|
99 |
|
100 | ISR(TIMER1_OVF_vect)
|
101 | {
|
102 |
|
103 | if(Zug2 == 1)
|
104 | {
|
105 | if(Bahn2 == 2500) //HALTEZEIT 500 ~ 1s / 5000 ~ 10s
|
106 | {
|
107 | Zug2 = 0;
|
108 | Bahn2 = 0;
|
109 | }
|
110 | Bahn2++;
|
111 | }
|
112 | else
|
113 | {
|
114 | if(Haltezeit2 == 500) //HALTEZEIT 500 ~ 1s / 5000 ~ 10s
|
115 | {
|
116 | Transfer(0x04,0x06);
|
117 | DDRB &= ~(1<<OSD1_Alarm);
|
118 | Haltezeit2 = 0;
|
119 | }
|
120 | Haltezeit2++;
|
121 | }
|
122 | }
|
123 |
|
124 |
|
125 |
|
126 |
|
127 |
|
128 | void Aus (void)
|
129 | {
|
130 | DDRE &= ~ (1 << CS2);
|
131 | }
|
132 |
|
133 | void An (void)
|
134 | {
|
135 | DDRE |= (1 << CS2);
|
136 | }
|
137 |
|
138 | int main(void)
|
139 | {
|
140 | InitSPI();
|
141 | int i = 0;
|
142 |
|
143 | while(1)
|
144 | {
|
145 | if(!(PIND & (1<<OSD2_Gl1_IRT)))
|
146 | {
|
147 | if((PINB & (1<<OSD2_Gl1_ZS1)) && (PIND & (1<<OSD2_Gl1_ZS2)))
|
148 | {
|
149 | if(Zug == 0)
|
150 | {
|
151 | Alarm2(0x11,5,1);
|
152 | DDRD |=(1<<OSD2_Alarm);
|
153 | timer_init_0();
|
154 | }
|
155 | }
|
156 | }
|
157 |
|
158 | if(!(PINB & (1<<OSD2_Gl1_ZS1)) || (!(PIND & (1<<OSD2_Gl1_ZS2))))
|
159 | {
|
160 | if(Zug == 0)
|
161 | {
|
162 | timer_init_0();
|
163 | Zug = 1;
|
164 | }
|
165 | }
|
166 |
|
167 | if(!(PIND & (1<<OSD2_Gl2_IRT)))
|
168 | {
|
169 | if((PIND & (1<<OSD2_Gl2_ZS1)) && (PIND & (1<<OSD2_Gl2_ZS2)))
|
170 | {
|
171 | if(Zug == 0)
|
172 | {
|
173 | Notausstieg2(0x2F,2);
|
174 | //zwei2(0x49);
|
175 | DDRD |=(1<<OSD2_Alarm);
|
176 | timer_init_0();
|
177 | }
|
178 | }
|
179 | }
|
180 |
|
181 | if(!(PINB & (1<<OSD2_Gl2_ZS1)) || (!(PIND & (1<<OSD2_Gl2_ZS2))))
|
182 | {
|
183 | if(Zug == 0)
|
184 | {
|
185 | timer_init_0();
|
186 | Zug = 1;
|
187 | }
|
188 | }
|
189 |
|
190 | if(!(PIND & (1<<OSD2_Gl1_DKPS)))
|
191 | {
|
192 | DKPS2(0x4D,8,1);
|
193 | DDRD |=(1<<OSD2_Alarm);
|
194 | timer_init_0();
|
195 | }
|
196 |
|
197 | if(!(PIND & (1<<OSD2_Gl2_DKPS)))
|
198 | {
|
199 | DKPS2(0x6B,3,2);
|
200 | DDRD |=(1<<OSD2_Alarm);
|
201 | timer_init_0();
|
202 | }
|
203 |
|
204 |
|
205 |
|
206 | if(!(PINF & (1<<OSD1_Gl1_IRT)))
|
207 | {
|
208 | if((PINF & (1<<OSD1_Gl1_ZS1)) && (PINF & (1<<OSD1_Gl1_ZS2)))
|
209 | {
|
210 | if(Zug2 == 0)
|
211 | {
|
212 | Alarm(0x11,5,1);
|
213 | DDRB |=(1<<OSD1_Alarm);
|
214 | timer_init_1();
|
215 | }
|
216 | }
|
217 | }
|
218 |
|
219 | if(!(PINF & (1<<OSD1_Gl1_ZS1)) || (!(PINF & (1<<OSD1_Gl1_ZS2))))
|
220 | {
|
221 | if(Zug2 == 0)
|
222 | {
|
223 | timer_init_1();
|
224 | Zug2 = 1;
|
225 | }
|
226 | }
|
227 |
|
228 | if(!(PINC & (1<<OSD1_Gl2_IRT)))
|
229 | {
|
230 | if((PINF & (1<<OSD1_Gl2_ZS1)) && (PINF & (1<<OSD1_Gl2_ZS2)))
|
231 | {
|
232 | if(Zug2 == 0)
|
233 | {
|
234 | Notausstieg(0x2F,2);
|
235 | DDRB |=(1<<OSD1_Alarm);
|
236 | timer_init_1();
|
237 | }
|
238 | }
|
239 | }
|
240 |
|
241 | if(!(PINF & (1<<OSD1_Gl2_ZS1)) || (!(PINF & (1<<OSD1_Gl2_ZS2))))
|
242 | {
|
243 | if(Zug2 == 0)
|
244 | {
|
245 | timer_init_1();
|
246 | Zug2 = 1;
|
247 | }
|
248 | }
|
249 |
|
250 | if(!(PINF & (1<<OSD1_Gl1_DKPS)))
|
251 | {
|
252 | DKPS(0x4D,6,1);
|
253 | DDRB |=(1<<OSD1_Alarm);
|
254 | timer_init_1();
|
255 | }
|
256 |
|
257 | if(!(PINC & (1<<OSD1_Gl2_DKPS)))
|
258 | {
|
259 | DKPS(0x6B,3,2);
|
260 | DDRB |=(1<<OSD1_Alarm);
|
261 | timer_init_1();
|
262 | }
|
263 | }
|
264 | }
|