1 | #include <msp430g2553.h>
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2 | #define TXD BIT2
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3 | #define RXD BIT1
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4 | unsigned char Rx_Data = 0; // Byte received via UART
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5 |
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6 | int main(void)
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7 | {
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8 | /*** Set-up system clocks ***/
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9 | WDTCTL = WDTPW + WDTHOLD; // Stop WDT
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10 | if (CALBC1_1MHZ == 0xFF) // If calibration constant erased
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11 | {
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12 | while (1); // do not load, trap CPU!
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13 | }
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14 | DCOCTL = 0; // Select lowest DCOx and MODx settings
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15 | BCSCTL1 = CALBC1_1MHZ; // Set DCO
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16 | DCOCTL = CALDCO_1MHZ;
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17 | /*** Set-up GPIO ***/
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18 | P2DIR = 0xFF; // All P2.x outputs
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19 | P2OUT &= 0x00; // All P2.x reset
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20 | P1SEL = RXD + TXD; // P1.1 = RXD, P1.2=TXD
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21 | P1SEL2 = RXD + TXD; // P1.1 = RXD, P1.2=TXD
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22 | P1DIR |= BIT0; // P1.6 set as output
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23 | P1OUT &= ~BIT0; // P1.0 set low
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24 |
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25 | /*** Set-up USCI A ***/
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26 | UCA0CTL1 |= UCSSEL_2; // SMCLK
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27 | UCA0BR0 = 104; // 1MHz 9600
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28 | UCA0BR1 = 0; // 1MHz 9600
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29 | UCA0MCTL = UCBRS0; // Modulation UCBRSx = 1
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30 | UCA0CTL1 &= ~UCSWRST; // Initialize USCI state machine
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31 | IE2 |= UCA0RXIE; // Enable USCI_A0 RX interrupt
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32 | __bis_SR_register(LPM0_bits + GIE); // Enter LPM0, interrupts enabled
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33 |
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34 | while(1)
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35 | {
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36 | switch (Rx_Data)
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37 | {
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38 | case 0x41: // ON Command
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39 | while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready?
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40 | UCA0TXBUF = 0x41; // Send 8-bit character
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41 | TA0CCTL0 &= ~CCIE; // Disable Timer0_A interrupts
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42 | P1SEL &= ~BIT6; // P1.6 selected as GPIO
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43 | P1OUT |= BIT6 + BIT0; // P1.0 and P1.6 set high
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44 | break;
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45 |
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46 | default:
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47 | break;
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48 | }
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49 | __bis_SR_register(LPM0_bits); // Enter LPM0, interrupts enabled
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50 | }
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51 | }
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52 |
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53 | // USCI A interrupt handler
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54 | #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
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55 | #pragma vector=USCIAB0RX_VECTOR
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56 | __interrupt void USCI0RX_ISR(void)
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57 | #elif defined(__GNUC__)
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58 | void __attribute__ ((interrupt(USCIAB0RX_VECTOR))) USCI0RX_ISR (void)
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59 | #else
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60 | #error Compiler not supported!
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61 | #endif
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62 |
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63 | {
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64 | Rx_Data = UCA0RXBUF; // Assign received byte to Rx_Data
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65 | __bic_SR_register_on_exit(LPM0_bits); // Wake-up CPU
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66 | }
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