1 | void lcd_init(void)
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2 | {
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3 | sbi(DDR(ll_cs_port),ll_cs_pin);
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4 | ll_cs_high;
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5 |
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6 | lcd_spi_init();
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7 |
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8 | // DeviceCode = LCD_ReadReg(0x0000); /* Read ID */
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9 | /* Different driver IC initialization*/
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10 | // if( DeviceCode == 0x9320 || DeviceCode == 0x9300 )
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11 | // {
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12 | lcd_write_reg(0x00,0x0000);
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13 | lcd_write_reg(0x01,0x0100); /* Driver Output Contral */
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14 | lcd_write_reg(0x02,0x0700); /* LCD Driver Waveform Contral */
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15 |
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16 | #if ( DISP_ORIENTATION == 0 )//0° grad
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17 | lcd_write_reg(0x0003,(1<<12) ); /* importance */
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18 | #endif
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19 | #if ( DISP_ORIENTATION == 1 )//90°
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20 | lcd_write_reg(0x0003,(1<<12)|(1<<5)|(1<<3) ); /* importance */
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21 | #endif
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22 | #if ( DISP_ORIENTATION == 2 )//180°
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23 | lcd_write_reg(0x0003,(1<<12)|(1<<4)|(1<<5) ); /* importance */
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24 | #endif
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25 | #if ( DISP_ORIENTATION == 3 )//270°
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26 | lcd_write_reg(0x0003,(1<<12)|(1<<4)|(1<<3) ); /* importance */
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27 | #endif
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28 | lcd_write_reg(0x04,0x0000); /* Scalling Contral */
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29 | lcd_write_reg(0x08,0x0202); /* Display Contral 2 */
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30 | lcd_write_reg(0x09,0x0000); /* Display Contral 3 */
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31 | lcd_write_reg(0x0a,0x0000); /* Frame Cycle Contal */
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32 | lcd_write_reg(0x0c,(1<<0)); /* Extern Display Interface Contral 1 */
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33 | lcd_write_reg(0x0d,0x0000); /* Frame Maker Position */
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34 | lcd_write_reg(0x0f,0x0000); /* Extern Display Interface Contral 2 */
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35 | _delay_ms(50);
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36 | lcd_write_reg(0x07,0x0101); /* Display Contral */
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37 | _delay_ms(50);
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38 | lcd_write_reg(0x10,(1<<12)|(0<<8)|(1<<7)|(1<<6)|(0<<4)); /* Power Control 1 */
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39 | lcd_write_reg(0x11,0x0007); /* Power Control 2 */
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40 | lcd_write_reg(0x12,(1<<8)|(1<<4)|(0<<0)); /* Power Control 3 */
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41 | lcd_write_reg(0x13,0x0b00); /* Power Control 4 */
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42 | lcd_write_reg(0x29,0x0000); /* Power Control 7 */
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43 | lcd_write_reg(0x2b,(1<<14)|(1<<4));
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44 |
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45 | lcd_write_reg(0x50,0); /* Set X Start */
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46 | lcd_write_reg(0x51,239); /* Set X End */
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47 | lcd_write_reg(0x52,0); /* Set Y Start */
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48 | lcd_write_reg(0x53,319); /* Set Y End */
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49 | _delay_ms(50);
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50 | lcd_write_reg(0x60,0x2700); /* Driver Output Control */
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51 | lcd_write_reg(0x61,0x0001); /* Driver Output Control */
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52 | lcd_write_reg(0x6a,0x0000); /* Vertical Srcoll Control */
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53 |
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54 | lcd_write_reg(0x80,0x0000); /* Display Position? Partial Display 1 */
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55 | lcd_write_reg(0x81,0x0000); /* RAM Address Start? Partial Display 1 */
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56 | lcd_write_reg(0x82,0x0000); /* RAM Address End-Partial Display 1 */
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57 | lcd_write_reg(0x83,0x0000); /* Displsy Position? Partial Display 2 */
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58 | lcd_write_reg(0x84,0x0000); /* RAM Address Start? Partial Display 2 */
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59 | lcd_write_reg(0x85,0x0000); /* RAM Address End? Partial Display 2 */
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60 |
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61 | lcd_write_reg(0x90,(0<<7)|(16<<0)); /* Frame Cycle Contral */
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62 | lcd_write_reg(0x92,0x0000); /* Panel Interface Contral 2 */
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63 | lcd_write_reg(0x93,0x0001); /* Panel Interface Contral 3 */
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64 | lcd_write_reg(0x95,0x0110); /* Frame Cycle Contral */
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65 | lcd_write_reg(0x97,(0<<8));
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66 | lcd_write_reg(0x98,0x0000); /* Frame Cycle Contral */
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67 | lcd_write_reg(0x07,0x0133);
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68 | // }
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69 | _delay_ms(100); /* delay 50 ms */
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70 | }
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