ADC auf Registerebene initialisieren

  RCC_ADCCLKConfig(RCC_PCLK2_Div6);

  RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);

  ADC_DeInit(ADC1);

  ADCInit.ADC_Mode = ADC_Mode_Independent;

  ADCInit.ADC_ScanConvMode = ENABLE; 

  ADCInit.ADC_ContinuousConvMode = ENABLE;

  ADCInit.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None;

  ADCInit.ADC_DataAlign = ADC_DataAlign_Right;

  ADCInit.ADC_NbrOfChannel = 4;

  ADC_Init(ADC1, &ADCInit);

  ADC_RegularChannelConfig(ADC1, ADC_Channel_12, 1,

  ADC_SampleTime_239Cycles5);

  ADC_RegularChannelConfig(ADC1, ADC_Channel_13, 2,

  ADC_SampleTime_239Cycles5);

  ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 3,

  ADC_SampleTime_239Cycles5);

  ADC_RegularChannelConfig(ADC1, ADC_Channel_15, 4,

  ADC_SampleTime_239Cycles5);

  ADC_Cmd(ADC1, ENABLE);

  ADC_DMACmd(ADC1, ENABLE);

  ADC_ResetCalibration(ADC1);

  while (ADC_GetResetCalibrationStatus(ADC1))

    ;

  ADC_StartCalibration(ADC1);

  while (ADC_GetCalibrationStatus(ADC1))

  //ADC1

  SYSCTRL_RCC_APB2 |= (1uL << SYSCTRL_ADC1_BIT);

  /* ADC1 Reset */

  RCC->APB2RSTR |= (1<<9);

  RCC->APB2RSTR &=~ (1<<9);

  RCC->CFGR&=~(3<<14);

  RCC->CFGR |= (2<<14);

  /* Scan mode enabled */

  ADC1->CR1 |= (1 << 8);

  /* Independent Mode */

  ADC1->CR1 &=~ (15 << 16);

  /* 4 Channels */

  ADC1->CR1 |= (3 << 1);

  /* Data alignment right & non external trigger*/

  ADC1->CR2 &=~ (17 << 11);

  /* Channel + sample (12 to 15 with 239cycles5) */

  ADC1->SMPR1 |= 0x0003FFC0;