Forum: Compiler & IDEs STM32 arm-none-eabi Linking Problem..


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von Holm T. (Gast)


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Moin,

ich bin über ein doofes Problem gestolpert. Ich habe angefangen mit der 
ST StandardPeripheralLib v1.0 angefangen was zu basteln auf einem 
Bluepill Board (STM32F103C8T6) ..hab aber da Ärger mit dem was die I2C 
Geschichte so treibt.

Das Setup geht auf das Zurück was W.S. hier mal verlinkt hatte. Da die 
Lib nun schon etwas sehr angegraut ist (2007) habe ich mich mal 
hingesetzt und die Version  3.5 runtergeladen und das Ganze 
zusammengebastelt.
Nach einer Weile compilierte das auch weitgehend fehlerfrei..aber:
1
...
2
arm-none-eabi-gcc -Wl,--gc-sections,-Map=main.elf.map,-cref,-u,Reset_Handler  -L lib -T stm32.ld main.o usart.o stm32f10x_it.o eeprom.o lib/libstm32.a --output main.elf
3
4
$ arm-none-eabi-objdump    -d main.elf|less                                                                                            
5
main.elf:     file format elf32-littlearm
6
7
8
Disassembly of section .text:
9
10
08000000 <_init>:
11
 8000000:       e1a0c00d        mov     ip, sp
12
 8000004:       e92ddff8        push    {r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr, pc}
13
 8000008:       e24cb004        sub     fp, ip, #4, 0
14
 800000c:       e24bd028        sub     sp, fp, #40, 0  ; 0x28
15
 8000010:       e89d6ff0        ldm     sp, {r4, r5, r6, r7, r8, r9, sl, fp, sp, lr}
16
 8000014:       e12fff1e        bx      lr
17
18
08000018 <_fini>:
19
 8000018:       e1a0c00d        mov     ip, sp
20
 800001c:       e92ddff8        push    {r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr, pc}
21
 8000020:       e24cb004        sub     fp, ip, #4, 0
22
 8000024:       e24bd028        sub     sp, fp, #40, 0  ; 0x28
23
 8000028:       e89d6ff0        ldm     sp, {r4, r5, r6, r7, r8, r9, sl, fp, sp, lr}
24
 800002c:       e12fff1e        bx      lr
25
$

..ist nicht so der Bringer, das File ist im Wesentlichen leer.

Allerdings enthält main.o schon das, was da rein soll:
1
$ arm-none-eabi-objdump    -d main.o|less 
2
3
main.o:     file format elf32-littlearm
4
5
6
Disassembly of section .text:
7
8
00000000 <Delay_ms>:
9
   0:   b580            push    {r7, lr}
10
   2:   b088            sub     sp, #32
11
   4:   af00            add     r7, sp, #0
12
   6:   6078            str     r0, [r7, #4]
13
   8:   f107 0308       add.w   r3, r7, #8
14
   c:   4618            mov     r0, r3
15
   e:   f7ff fffe       bl      0 <RCC_GetClocksFreq>
16
  12:   68fb            ldr     r3, [r7, #12]
17
  14:   4a09            ldr     r2, [pc, #36]   ; (3c <Delay_ms+0x3c>)
18
  16:   fba2 2303       umull   r2, r3, r2, r3
19
  1a:   0b5b            lsrs    r3, r3, #13
20
  1c:   687a            ldr     r2, [r7, #4]
21
  1e:   fb02 f303       mul.w   r3, r2, r3
22
  22:   61fb            str     r3, [r7, #28]
23
  24:   e002            b.n     2c <Delay_ms+0x2c>
24
  26:   69fb            ldr     r3, [r7, #28]
25
  28:   3b01            subs    r3, #1
26
  2a:   61fb            str     r3, [r7, #28]
27
  2c:   69fb            ldr     r3, [r7, #28]
28
  2e:   2b00            cmp     r3, #0
29
  30:   d1f9            bne.n   26 <Delay_ms+0x26>
30
  32:   bf00            nop
31
  34:   3720            adds    r7, #32
32
  36:   46bd            mov     sp, r7
33
  38:   bd80            pop     {r7, pc}
34
  3a:   bf00            nop
35
  3c:   d1b71759        .word   0xd1b71759
36
37
00000040 <Delay>:
38
  40:   b480            push    {r7}
39
  42:   b083            sub     sp, #12
40
  44:   af00            add     r7, sp, #0
41
  46:   6078            str     r0, [r7, #4]
42
[..]

Der Linker Aufruf (arm-none-eabi-gcc 
-Wl,--gc-sections,-Map=main.elf.map,-cref,-u,Reset_Handler ..) 
beinhaltet zwar die Garbadge Collection (-gc-sections) aber wieso haut 
der .text raus?

aus dem Linker Map file:
1
Discarded input sections
2
3
 .text          0x0000000000000000        0x0 /usr/local/lib/gcc/arm-none-eabi/6.4.0/crti.o
4
 .data          0x0000000000000000        0x0 /usr/local/lib/gcc/arm-none-eabi/6.4.0/crti.o
5
 .bss           0x0000000000000000        0x0 /usr/local/lib/gcc/arm-none-eabi/6.4.0/crti.o
6
 .text          0x0000000000000000      0x108 /usr/local/lib/gcc/arm-none-eabi/6.4.0/crtbegin.o
7
 .data          0x0000000000000000        0x4 /usr/local/lib/gcc/arm-none-eabi/6.4.0/crtbegin.o
8
 .bss           0x0000000000000000       0x1c /usr/local/lib/gcc/arm-none-eabi/6.4.0/crtbegin.o
9
 .init_array    0x0000000000000000        0x4 /usr/local/lib/gcc/arm-none-eabi/6.4.0/crtbegin.o
10
 .fini_array    0x0000000000000000        0x4 /usr/local/lib/gcc/arm-none-eabi/6.4.0/crtbegin.o
11
 .eh_frame      0x0000000000000000        0x0 /usr/local/lib/gcc/arm-none-eabi/6.4.0/crtbegin.o
12
 .jcr           0x0000000000000000        0x0 /usr/local/lib/gcc/arm-none-eabi/6.4.0/crtbegin.o
13
 .tm_clone_table
14
                0x0000000000000000        0x0 /usr/local/lib/gcc/arm-none-eabi/6.4.0/crtbegin.o
15
 .comment       0x0000000000000000       0x37 /usr/local/lib/gcc/arm-none-eabi/6.4.0/crtbegin.o
16
 .ARM.attributes
17
                0x0000000000000000       0x30 /usr/local/lib/gcc/arm-none-eabi/6.4.0/crtbegin.o
18
 .text          0x0000000000000000      0x104 /usr/local/lib/gcc/arm-none-eabi/6.4.0/../../../../arm-none-eabi/lib/crt0.o
19
 .data          0x0000000000000000        0x0 /usr/local/lib/gcc/arm-none-eabi/6.4.0/../../../../arm-none-eabi/lib/crt0.o
20
 .bss           0x0000000000000000        0x0 /usr/local/lib/gcc/arm-none-eabi/6.4.0/../../../../arm-none-eabi/lib/crt0.o
21
 .ARM.extab     0x0000000000000000        0x0 /usr/local/lib/gcc/arm-none-eabi/6.4.0/../../../../arm-none-eabi/lib/crt0.o
22
 .ARM.exidx     0x0000000000000000        0x8 /usr/local/lib/gcc/arm-none-eabi/6.4.0/../../../../arm-none-eabi/lib/crt0.o
23
 .debug_line    0x0000000000000000       0x91 /usr/local/lib/gcc/arm-none-eabi/6.4.0/../../../../arm-none-eabi/lib/crt0.o
24
 .debug_info    0x0000000000000000       0x26 /usr/local/lib/gcc/arm-none-eabi/6.4.0/../../../../arm-none-eabi/lib/crt0.o
25
 .debug_abbrev  0x0000000000000000       0x14 /usr/local/lib/gcc/arm-none-eabi/6.4.0/../../../../arm-none-eabi/lib/crt0.o
26
 .debug_aranges
27
                0x0000000000000000       0x20 /usr/local/lib/gcc/arm-none-eabi/6.4.0/../../../../arm-none-eabi/lib/crt0.o
28
 .debug_str     0x0000000000000000       0x7e /usr/local/lib/gcc/arm-none-eabi/6.4.0/../../../../arm-none-eabi/lib/crt0.o
29
 .ARM.attributes
30
                0x0000000000000000       0x12 /usr/local/lib/gcc/arm-none-eabi/6.4.0/../../../../arm-none-eabi/lib/crt0.o
31
 .text          0x0000000000000000      0x768 main.o
32
 .data          0x0000000000000000        0x1 main.o
33
 .bss           0x0000000000000000        0x0 main.o
34
 .rodata        0x0000000000000000       0x10 main.o
35
 .debug_info    0x0000000000000000      0x85c main.o
36
 .debug_abbrev  0x0000000000000000      0x287 main.o
37
 .debug_aranges
38
                0x0000000000000000       0x20 main.o
39
 .debug_line    0x0000000000000000      0x371 main.o
40
 .debug_str     0x0000000000000000      0x6e0 main.o
41
 .comment       0x0000000000000000       0x37 main.o
42
 .debug_frame   0x0000000000000000      0x240 main.o
43
 .ARM.attributes
44
[..]

Spannend daran ist, das ich die selben Linker configuration files 
verwende wie vorher, auch die Startup Geschichte sollte die Selbe 
sein...

Ist da schon mal Jemand drüber gestolpert?

Gruß,
Holm

von Niklas G. (erlkoenig) Benutzerseite


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Zeig doch mal deine stm32.ld und deinen Startup Code (Reset_Handler). 
Wozu das "-u Reset_Handler"? Wozu eine -L Option aber keine -l Option?

von Holm T. (Gast)


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..ein Haufen Kram...

stm32.ld:
1
/*
2
Linker script for STM32F10x
3
Copyright RAISONANCE 2007 (modified by Lanchon 1-Feb-2008)
4
You can use, copy and distribute this file freely, but without any waranty.
5
Configure memory sizes, end of stack and boot mode for your project here.
6
*/
7
8
9
/* include the common STM32F10x sub-script */
10
INCLUDE "STM32_COMMON.ld"
11
12
/* Memory Spaces Definitions */
13
MEMORY
14
{
15
  RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K  /* also change _estack below */
16
  FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K
17
  FLASHB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
18
  EXTMEMB0 (rx) : ORIGIN = 0x00000000, LENGTH = 0
19
  EXTMEMB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
20
  EXTMEMB2 (rx) : ORIGIN = 0x00000000, LENGTH = 0
21
  EXTMEMB3 (rx) : ORIGIN = 0x00000000, LENGTH = 0
22
}
23
24
/* highest address of the user mode stack */
25
_estack =  ORIGIN(RAM) + LENGTH(RAM);
26
27
/* include the section management sub-script */
28
/* (either "STM32_SEC_FLASH.ld" or "STM32_SEC_RAM.ld") */
29
INCLUDE "STM32_SEC_FLASH.ld"

lib/STM32_COMMON.ld:
1
/*
2
Common part of the linker scripts for STR32 devices
3
Copyright RAISONANCE 2007
4
You can use, modify and distribute thisfile freely, but without any waranty.
5
*/
6
7
8
/* default stack sizes. 
9
10
These are used by the startup in order to allocate stacks for the different modes.
11
*/
12
13
__Stack_Size = 1024 ;
14
15
PROVIDE ( _Stack_Size = __Stack_Size ) ;
16
17
__Stack_Init = _estack  - __Stack_Size ;
18
19
/*"PROVIDE" allows to easily override these values from an object file or the commmand line.*/
20
PROVIDE ( _Stack_Init = __Stack_Init ) ;
21
22
/*
23
There will be a link error if there is not this amount of RAM free at the end.
24
*/
25
_Minimum_Stack_Size = 0x100 ;
26
27
28
29
/*
30
this sends all unreferenced IRQHandlers to reset
31
*/
32
33
34
PROVIDE (   Undefined_Handler = 0 ) ;
35
PROVIDE (   SWI_Handler = 0 ) ;
36
PROVIDE (   IRQ_Handler = 0 ) ;
37
PROVIDE (   Prefetch_Handler = 0 ) ;
38
PROVIDE (   Abort_Handler = 0 ) ;
39
PROVIDE (   FIQ_Handler = 0 ) ;
40
41
PROVIDE (   NMIException = 0 ) ;
42
PROVIDE (   HardFaultException = 0 ) ;
43
PROVIDE (   MemManageException = 0 ) ;
44
PROVIDE (   BusFaultException = 0 ) ;
45
PROVIDE (   UsageFaultException = 0 ) ;
46
PROVIDE (   SVCHandler = 0 ) ;
47
PROVIDE (   DebugMonitor = 0 ) ;
48
PROVIDE (   PendSVC = 0 ) ;
49
PROVIDE (   SysTickHandler = 0 ) ;
50
PROVIDE (   WWDG_IRQHandler = 0 ) ;
51
PROVIDE (   PVD_IRQHandler = 0 ) ;
52
PROVIDE (   TAMPER_IRQHandler = 0 ) ;
53
PROVIDE (   RTC_IRQHandler = 0 ) ;
54
PROVIDE (   FLASH_IRQHandler = 0 ) ;
55
PROVIDE (   RCC_IRQHandler = 0 ) ;
56
PROVIDE (   EXTI0_IRQHandler = 0 ) ;
57
PROVIDE (   EXTI1_IRQHandler = 0 ) ;
58
PROVIDE (   EXTI2_IRQHandler = 0 ) ;
59
PROVIDE (   EXTI3_IRQHandler = 0 ) ;
60
PROVIDE (   EXTI4_IRQHandler = 0 ) ;
61
PROVIDE (   DMAChannel1_IRQHandler = 0 ) ;
62
PROVIDE (   DMAChannel2_IRQHandler = 0 ) ;
63
PROVIDE (   DMAChannel3_IRQHandler = 0 ) ;
64
PROVIDE (   DMAChannel4_IRQHandler = 0 ) ;
65
PROVIDE (   DMAChannel5_IRQHandler = 0 ) ;
66
PROVIDE (   DMAChannel6_IRQHandler = 0 ) ;
67
PROVIDE (   DMAChannel7_IRQHandler = 0 ) ;
68
PROVIDE (   ADC_IRQHandler = 0 ) ;
69
PROVIDE (   USB_HP_CAN_TX_IRQHandler = 0 ) ;
70
PROVIDE (   USB_LP_CAN_RX0_IRQHandler = 0 ) ;
71
PROVIDE (   CAN_RX1_IRQHandler = 0 ) ;
72
PROVIDE (   CAN_SCE_IRQHandler = 0 ) ;
73
PROVIDE (   EXTI9_5_IRQHandler = 0 ) ;
74
PROVIDE (   TIM1_BRK_IRQHandler = 0 ) ;
75
PROVIDE (   TIM1_UP_IRQHandler = 0 ) ;
76
PROVIDE (   TIM1_TRG_COM_IRQHandler = 0 ) ;
77
PROVIDE (   TIM1_CC_IRQHandler = 0 ) ;
78
PROVIDE (   TIM2_IRQHandler = 0 ) ;
79
PROVIDE (   TIM3_IRQHandler = 0 ) ;
80
PROVIDE (   TIM4_IRQHandler = 0 ) ;
81
PROVIDE (   I2C1_EV_IRQHandler = 0 ) ;
82
PROVIDE (   I2C1_ER_IRQHandler = 0 ) ;
83
PROVIDE (   I2C2_EV_IRQHandler = 0 ) ;
84
PROVIDE (   I2C2_ER_IRQHandler = 0 ) ;
85
PROVIDE (   SPI1_IRQHandler = 0 ) ;
86
PROVIDE (   SPI2_IRQHandler = 0 ) ;
87
PROVIDE (   USART1_IRQHandler = 0 ) ;
88
PROVIDE (   USART2_IRQHandler = 0 ) ;
89
PROVIDE (   USART3_IRQHandler = 0 ) ;
90
PROVIDE (   EXTI15_10_IRQHandler = 0 ) ;
91
PROVIDE (   RTCAlarm_IRQHandler = 0 ) ;
92
PROVIDE (   USBWakeUp_IRQHandler = 0 ) ;
93
94
95
96
/******************************************************************************/
97
/*                       Peripheral memory map                                */
98
/******************************************************************************/
99
/*this allows to compile the ST lib in "non-debug" mode*/
100
101
102
/* Peripheral and SRAM base address in the alias region */
103
PERIPH_BB_BASE        = 0x42000000;
104
SRAM_BB_BASE          = 0x22000000;
105
106
/* Peripheral and SRAM base address in the bit-band region */
107
SRAM_BASE             = 0x20000000;
108
PERIPH_BASE           = 0x40000000;
109
110
/* Flash registers base address */
111
PROVIDE ( FLASH_BASE            = 0x40022000);
112
/* Flash Option Bytes base address */
113
PROVIDE ( OB_BASE               = 0x1FFFF800);
114
115
/* Peripheral memory map */
116
APB1PERIPH_BASE      = PERIPH_BASE  ;
117
APB2PERIPH_BASE      = (PERIPH_BASE + 0x10000) ;
118
AHBPERIPH_BASE       = (PERIPH_BASE + 0x20000) ;
119
120
PROVIDE ( TIM2            = (APB1PERIPH_BASE + 0x0000) ) ;
121
PROVIDE ( TIM3            = (APB1PERIPH_BASE + 0x0400) ) ;
122
PROVIDE ( TIM4            = (APB1PERIPH_BASE + 0x0800) ) ;
123
PROVIDE ( RTC             = (APB1PERIPH_BASE + 0x2800) ) ;
124
PROVIDE ( WWDG            = (APB1PERIPH_BASE + 0x2C00) ) ;
125
PROVIDE ( IWDG            = (APB1PERIPH_BASE + 0x3000) ) ;
126
PROVIDE ( SPI2            = (APB1PERIPH_BASE + 0x3800) ) ;
127
PROVIDE ( USART2          = (APB1PERIPH_BASE + 0x4400) ) ;
128
PROVIDE ( USART3          = (APB1PERIPH_BASE + 0x4800) ) ;
129
PROVIDE ( I2C1            = (APB1PERIPH_BASE + 0x5400) ) ;
130
PROVIDE ( I2C2            = (APB1PERIPH_BASE + 0x5800) ) ;
131
PROVIDE ( CAN             = (APB1PERIPH_BASE + 0x6400) ) ;
132
PROVIDE ( BKP             = (APB1PERIPH_BASE + 0x6C00) ) ;
133
PROVIDE ( PWR             = (APB1PERIPH_BASE + 0x7000) ) ;
134
135
PROVIDE ( AFIO            = (APB2PERIPH_BASE + 0x0000) ) ;
136
PROVIDE ( EXTI            = (APB2PERIPH_BASE + 0x0400) ) ;
137
PROVIDE ( GPIOA           = (APB2PERIPH_BASE + 0x0800) ) ;
138
PROVIDE ( GPIOB           = (APB2PERIPH_BASE + 0x0C00) ) ;
139
PROVIDE ( GPIOC           = (APB2PERIPH_BASE + 0x1000) ) ;
140
PROVIDE ( GPIOD           = (APB2PERIPH_BASE + 0x1400) ) ;
141
PROVIDE ( GPIOE           = (APB2PERIPH_BASE + 0x1800) ) ;
142
PROVIDE ( ADC1            = (APB2PERIPH_BASE + 0x2400) ) ;
143
PROVIDE ( ADC2            = (APB2PERIPH_BASE + 0x2800) ) ;
144
PROVIDE ( TIM1            = (APB2PERIPH_BASE + 0x2C00) ) ;
145
PROVIDE ( SPI1            = (APB2PERIPH_BASE + 0x3000) ) ;
146
PROVIDE ( USART1          = (APB2PERIPH_BASE + 0x3800) ) ;
147
148
PROVIDE ( DMA             = (AHBPERIPH_BASE + 0x0000) ) ;
149
PROVIDE ( DMA_Channel1    = (AHBPERIPH_BASE + 0x0008) ) ;
150
PROVIDE ( DMA_Channel2    = (AHBPERIPH_BASE + 0x001C) ) ;
151
PROVIDE ( DMA_Channel3    = (AHBPERIPH_BASE + 0x0030) ) ;
152
PROVIDE ( DMA_Channel4    = (AHBPERIPH_BASE + 0x0044) ) ;
153
PROVIDE ( DMA_Channel5    = (AHBPERIPH_BASE + 0x0058) ) ;
154
PROVIDE ( DMA_Channel6    = (AHBPERIPH_BASE + 0x006C) ) ;
155
PROVIDE ( DMA_Channel7    = (AHBPERIPH_BASE + 0x0080) ) ;
156
PROVIDE ( RCC             = (AHBPERIPH_BASE + 0x1000) ) ;
157
158
/* System Control Space memory map */
159
SCS_BASE              = 0xE000E000;
160
161
PROVIDE ( SysTick         = (SCS_BASE + 0x0010) ) ;
162
PROVIDE ( NVIC            = (SCS_BASE + 0x0100) ) ;
163
PROVIDE ( SCB             = (SCS_BASE + 0x0D00) ) ;

lib/STM32_SEC_FLASH.ld:
1
/*
2
Common part of the linker scripts for STR71x devices in FLASH mode
3
(that is, the FLASH is seen at 0)
4
Copyright RAISONANCE 2005
5
You can use, modify and distribute thisfile freely, but without any waranty.
6
*/
7
8
9
10
/* Sections Definitions */
11
12
SECTIONS
13
{
14
    /* for Cortex devices, the beginning of the startup code is stored in the .isr_vector section, which goes to FLASH */
15
    .isr_vector :
16
    {
17
        . = ALIGN(4);
18
        KEEP(*(.isr_vector))            /* Startup code */
19
        . = ALIGN(4);
20
    } >FLASH
21
 
22
    /* for some STRx devices, the beginning of the startup code is stored in the .flashtext section, which goes to FLASH */
23
    .flashtext :
24
    {
25
        . = ALIGN(4);
26
        *(.flashtext)            /* Startup code */
27
        . = ALIGN(4);
28
    } >FLASH
29
 
30
    
31
    /* the program code is stored in the .text section, which goes to Flash */
32
    .text :
33
    {
34
            . = ALIGN(4);
35
            
36
        *(.text)                   /* remaining code */
37
        *(.text.*)                   /* remaining code */
38
        *(.rodata)                 /* read-only data (constants) */
39
        *(.rodata*)
40
        
41
        /* Static constructors and destructors */
42
        KEEP(*(.init))
43
        KEEP(*(.fini))
44
45
        *(.glue_7)
46
        *(.glue_7t)
47
48
            . = ALIGN(4);
49
         _etext = .;
50
            /* This is used by the startup in order to initialize the .data secion */
51
         _sidata = _etext;
52
    } >FLASH
53
    
54
 
55
56
    /* This is the initialized data section
57
    The program executes knowing that the data is in the RAM
58
    but the loader puts the initial values in the FLASH (inidata).
59
    It is one task of the startup to copy the initial values from FLASH to RAM. */
60
    .data  : AT ( _sidata )
61
    {
62
            . = ALIGN(4);
63
        /* This is used by the startup in order to initialize the .data secion */
64
        _sdata = . ;
65
        
66
        *(.data)
67
        *(.data.*)
68
69
            . = ALIGN(4);
70
            /* This is used by the startup in order to initialize the .data secion */
71
         _edata = . ;
72
    } >RAM
73
    
74
    
75
76
    /* This is the uninitialized data section */
77
    .bss :
78
    {
79
            . = ALIGN(4);
80
        /* This is used by the startup in order to initialize the .bss secion */
81
        _sbss = .;
82
        
83
        *(.bss)
84
        *(COMMON)
85
        
86
            . = ALIGN(4);
87
            /* This is used by the startup in order to initialize the .bss secion */
88
         _ebss = . ;
89
    } >RAM
90
    
91
    PROVIDE ( end = _ebss );
92
    PROVIDE ( _end = _ebss );
93
    
94
    /* This is the user stack section 
95
    This is just to check that there is enough RAM left for the User mode stack
96
    It should generate an error if it's full.
97
     */
98
    ._usrstack :
99
    {
100
            . = ALIGN(4);
101
        _susrstack = . ;
102
        
103
        . = . + _Minimum_Stack_Size ;
104
        
105
            . = ALIGN(4);
106
        _eusrstack = . ;
107
    } >RAM
108
    
109
110
   
111
    /* this is the FLASH Bank1 */
112
    /* the C or assembly source must explicitly place the code or data there
113
    using the "section" attribute */
114
    .b1text :
115
    {
116
        *(.b1text)                   /* remaining code */
117
        *(.b1rodata)                 /* read-only data (constants) */
118
        *(.b1rodata*)
119
    } >FLASHB1
120
    /* this is the EXTMEM */
121
    /* the C or assembly source must explicitly place the code or data there
122
    using the "section" attribute */
123
    
124
    /* EXTMEM Bank0 */
125
    .eb0text :
126
    {
127
        *(.eb0text)                   /* remaining code */
128
        *(.eb0rodata)                 /* read-only data (constants) */
129
        *(.eb0rodata*)
130
    } >EXTMEMB0
131
    
132
    /* EXTMEM Bank1 */
133
    .eb1text :
134
    {
135
        *(.eb1text)                   /* remaining code */
136
        *(.eb1rodata)                 /* read-only data (constants) */
137
        *(.eb1rodata*)
138
    } >EXTMEMB1
139
    
140
    /* EXTMEM Bank2 */
141
    .eb2text :
142
    {
143
        *(.eb2text)                   /* remaining code */
144
        *(.eb2rodata)                 /* read-only data (constants) */
145
        *(.eb2rodata*)
146
    } >EXTMEMB2
147
    
148
    /* EXTMEM Bank0 */
149
    .eb3text :
150
    {
151
        *(.eb3text)                   /* remaining code */
152
        *(.eb3rodata)                 /* read-only data (constants) */
153
        *(.eb3rodata*)
154
    } >EXTMEMB3
155
    
156
    __exidx_start = .;
157
    __exidx_end = .;
158
    
159
    /* after that it's only debugging information. */
160
    
161
    /* remove the debugging information from the standard libraries */
162
    /DISCARD/ :
163
    {
164
     libc.a ( * )
165
     libm.a ( * )
166
     libgcc.a ( * )
167
     }
168
169
    /* Stabs debugging sections.  */
170
    .stab          0 : { *(.stab) }
171
    .stabstr       0 : { *(.stabstr) }
172
    .stab.excl     0 : { *(.stab.excl) }
173
    .stab.exclstr  0 : { *(.stab.exclstr) }
174
    .stab.index    0 : { *(.stab.index) }
175
    .stab.indexstr 0 : { *(.stab.indexstr) }
176
    .comment       0 : { *(.comment) }
177
    /* DWARF debug sections.
178
       Symbols in the DWARF debugging sections are relative to the beginning
179
       of the section so we begin them at 0.  */
180
    } >EXTMEMB2
181
    
182
    /* EXTMEM Bank0 */
183
    .eb3text :
184
    {
185
        *(.eb3text)                   /* remaining code */
186
        *(.eb3rodata)                 /* read-only data (constants) */
187
        *(.eb3rodata*)
188
    } >EXTMEMB3
189
    
190
    __exidx_start = .;
191
    __exidx_end = .;
192
    
193
    /* after that it's only debugging information. */
194
    
195
    /* remove the debugging information from the standard libraries */
196
    /DISCARD/ :
197
    {
198
     libc.a ( * )
199
     libm.a ( * )
200
     libgcc.a ( * )
201
     }
202
203
    /* Stabs debugging sections.  */
204
    .stab          0 : { *(.stab) }
205
    .stabstr       0 : { *(.stabstr) }
206
    .stab.excl     0 : { *(.stab.excl) }
207
    .stab.exclstr  0 : { *(.stab.exclstr) }
208
    .stab.index    0 : { *(.stab.index) }
209
    .stab.indexstr 0 : { *(.stab.indexstr) }
210
    .comment       0 : { *(.comment) }
211
    /* DWARF debug sections.
212
       Symbols in the DWARF debugging sections are relative to the beginning
213
       of the section so we begin them at 0.  */
214
    /* DWARF 1 */
215
    .debug          0 : { *(.debug) }
216
    .line           0 : { *(.line) }
217
    /* GNU DWARF 1 extensions */
218
    .debug_srcinfo  0 : { *(.debug_srcinfo) }
219
    .debug_sfnames  0 : { *(.debug_sfnames) }
220
    /* DWARF 1.1 and DWARF 2 */
221
    .debug_aranges  0 : { *(.debug_aranges) }
222
    .debug_pubnames 0 : { *(.debug_pubnames) }
223
    /* DWARF 2 */
224
    .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
225
    .debug_abbrev   0 : { *(.debug_abbrev) }
226
    .debug_line     0 : { *(.debug_line) }
227
    .debug_frame    0 : { *(.debug_frame) }
228
    .debug_str      0 : { *(.debug_str) }
229
    .debug_loc      0 : { *(.debug_loc) }
230
    .debug_macinfo  0 : { *(.debug_macinfo) }
231
    /* SGI/MIPS DWARF 2 extensions */
232
    .debug_weaknames 0 : { *(.debug_weaknames) }
233
    .debug_funcnames 0 : { *(.debug_funcnames) }
234
    .debug_typenames 0 : { *(.debug_typenames) }
235
    .debug_varnames  0 : { *(.debug_varnames) }
236
}


..der Reset_handler oder genauer seine Nichtexistenz in der 
umgebastelten Umgebung wird wohl das Problem sein.

In der Originalversion aus der readme.txt:
1
[..]
2
Step-by-Step:
3
- Install CodeSourcery's arm-eabi package.
4
- Install the STM32 Flash Loader Demonstrator
5
- type cs-make in the projects's root directory (see above for further
6
  options). This creates the files main.elf and main.bin:
7
   arm-none-eabi-gcc -Wl,--gc-sections,-Map=main.elf.map,-cref,-u,Reset_Handler 
8
    -I . -I lib/inc -L lib -T stm32.ld main.o stm32f10x_it.o lib/libstm32.a 
9
    --output main.elf
10
   arm-none-eabi-objcopy -O binary main.elf main.bin

So viel zur Frage was das soll, einen Kopf hatte ich mir bisher nicht 
darum gemacht.

Da gabs auch in lib/src/stm32f10x_vector.c den Reset_Handler:
1
/*******************************************************************************
2
* Function Name  : Reset_Handler
3
* Description    : This is the code that gets called when the processor first
4
*                  starts execution following a reset event. Only the absolutely
5
*                  necessary set is performed, after which the application
6
*                  supplied main() routine is called. 
7
* Input          :
8
* Output         :
9
* Return         :
10
*******************************************************************************/
11
void Reset_Handler(void)
12
{
13
    unsigned long *pulSrc, *pulDest;
14
15
    //
16
    // Copy the data segment initializers from flash to SRAM.
17
    //
18
    pulSrc = &_sidata;
19
    for(pulDest = &_sdata; pulDest < &_edata; )
20
    {
21
        *(pulDest++) = *(pulSrc++);
22
    }
23
24
    //
25
    // Zero fill the bss segment.
26
    //
27
    for(pulDest = &_sbss; pulDest < &_ebss; )
28
    {
29
        *(pulDest++) = 0;
30
    }
31
32
    //
33
    // Call the application's entry point.
34
    //
35
    main();
36
}
37
38
39
/****************** (C) COPYRIGHT 2007 STMicroelectronics  *****END OF FILE****/

..der aber in der neueren Variante offenbar nicht enthalten ist.

Danke, Ich kümmere mich..

Gruß,

Holm

von Niklas G. (erlkoenig) Benutzerseite


Bewertung
0 lesenswert
nicht lesenswert
Im Linker-Script mangelt es an einem "ENTRY(Reset_Handler)".
1
PROVIDE ( TIM2            = (APB1PERIPH_BASE + 0x0000) ) ;
2
PROVIDE ( TIM3            = (APB1PERIPH_BASE + 0x0400) ) ;

Interessant, wusste gar nicht dass es eine Umgebung gibt welche 
Peripherie-Adressen so einstellt. Hatte immer die Idee im Hinterkopf das 
mal so zu machen, es aber nie umgesetzt oder gesehen.

Holm T. schrieb:
> Da gabs auch in lib/src/stm32f10x_vector.c den Reset_Handler:

Heißt das der Reset_Handler wird als Teil einer statischen Bibliothek 
mit gelinkt? Falls "ENTRY" nicht hilft, linke mal via
1
-Wl,--start-group lib/libstm32.a -Wl,--end-group
 oder mit
1
-Wl,--whole-archive lib/libstm32.a -Wl,-no-whole-archive
ich kann mir nie merken was jetzt genau wie gebraucht wird ;-)

von Holm T. (Gast)


Bewertung
0 lesenswert
nicht lesenswert
Niklas G. schrieb:
> Im Linker-Script mangelt es an einem "ENTRY(Reset_Handler)".
>
>
1
PROVIDE ( TIM2            = (APB1PERIPH_BASE + 0x0000) ) ;
2
> PROVIDE ( TIM3            = (APB1PERIPH_BASE + 0x0400) ) ;
>
> Interessant, wusste gar nicht dass es eine Umgebung gibt welche
> Peripherie-Adressen so einstellt. Hatte immer die Idee im Hinterkopf das
> mal so zu machen, es aber nie umgesetzt oder gesehen.
>
> Holm T. schrieb:
>> Da gabs auch in lib/src/stm32f10x_vector.c den Reset_Handler:
>
> Heißt das der Reset_Handler wird als Teil einer statischen Bibliothek
> mit gelinkt?


Ja, wurde in der alten Variante so gemacht.

>Falls "ENTRY" nicht hilft, linke mal via
>
1
-Wl,--start-group lib/libstm32.a -Wl,--end-group
 oder mit
>
1
-Wl,--whole-archive lib/libstm32.a -Wl,-no-whole-archive
ich
> kann mir nie merken was jetzt genau wie gebraucht wird ;-)
./STM32F10x_StdPeriph_Lib_V3.5.0/Libraries/CMSIS/CM3/DeviceSupport/ST/ST 
M32F10x/startup/gcc_ride7/startup_stm32f10x_md.s

mit hinzu gelinkt:
1
/**
2
  ******************************************************************************
3
  * @file      startup_stm32f10x_md.s
4
  * @author    MCD Application Team
5
  * @version   V3.5.0
6
  * @date      11-March-2011
7
  * @brief     STM32F10x Medium Density Devices vector table for RIDE7 toolchain.
8
  *            This module performs:
9
  *                - Set the initial SP
10
  *                - Set the initial PC == Reset_Handler,
11
  *                - Set the vector table entries with the exceptions ISR address
12
  *                - Configure the clock system 
13
  *                - Branches to main in the C library (which eventually
14
  *                  calls main()).
15
  *            After Reset the Cortex-M3 processor is in Thread mode,
16
  *            priority is Privileged, and the Stack is set to Main.
17
  ******************************************************************************
18
  * @attention
19
  *
20
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
21
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
22
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
23
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
24
  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
25
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
26
  *
27
  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
28
  ******************************************************************************
29
  */
30
    
31
  .syntax unified
32
        .cpu cortex-m3
33
        .fpu softvfp
34
        .thumb
35
36
.global g_pfnVectors
37
.global Default_Handler
38
39
/* start address for the initialization values of the .data section. 
40
defined in linker script */
41
.word   _sidata
42
/* start address for the .data section. defined in linker script */  
43
.word   _sdata
44
/* end address for the .data section. defined in linker script */
45
.word   _edata
46
/* start address for the .bss section. defined in linker script */
47
.word   _sbss
48
/* end address for the .bss section. defined in linker script */
49
.word   _ebss
50
51
.equ  BootRAM, 0xF108F85F
52
/**
53
 * @brief  This is the code that gets called when the processor first
54
 *          starts execution following a reset event. Only the absolutely
55
 *          necessary set is performed, after which the application
56
 *          supplied main() routine is called. 
57
 * @param  None
58
 * @retval : None
59
*/
60
    .section    .text.Reset_Handler
61
        .weak   Reset_Handler
62
        .type   Reset_Handler, %function
63
Reset_Handler:  
64
65
/* Copy the data segment initializers from flash to SRAM */  
66
  movs  r1, #0
67
  b     LoopCopyDataInit
68
69
CopyDataInit:
70
        ldr     r3, =_sidata
71
        ldr     r3, [r3, r1]
72
        str     r3, [r0, r1]
73
        adds    r1, r1, #4
74
    
75
LoopCopyDataInit:
76
        ldr     r0, =_sdata
77
        ldr     r3, =_edata
78
        adds    r2, r0, r1
79
        cmp     r2, r3
80
        bcc     CopyDataInit
81
        ldr     r2, =_sbss
82
        b       LoopFillZerobss
83
/* Zero fill the bss segment. */  
84
FillZerobss:
85
        movs    r3, #0
86
        str     r3, [r2], #4
87
    
88
LoopFillZerobss:
89
        ldr     r3, = _ebss
90
        cmp     r2, r3
91
        bcc     FillZerobss
92
/* Call the clock system intitialization function.*/
93
  bl  SystemInit        
94
/* Call the application's entry point.*/
95
        bl      main
96
        bx      lr    
97
.size   Reset_Handler, .-Reset_Handler
98
99
/**
100
 * @brief  This is the code that gets called when the processor receives an 
101
 *         unexpected interrupt. This simply enters an infinite loop, preserving
102
 *         the system state for examination by a debugger.
103
 * @param  None     
104
 * @retval None       
105
*/
106
    .section    .text.Default_Handler,"ax",%progbits
107
Default_Handler:
108
Infinite_Loop:
109
        b       Infinite_Loop
110
        .size   Default_Handler, .-Default_Handler
111
/******************************************************************************
112
*
113
* The minimal vector table for a Cortex M3.  Note that the proper constructs
114
* must be placed on this to ensure that it ends up at physical address
115
* 0x0000.0000.
116
*
117
******************************************************************************/    
118
        .section        .isr_vector,"a",%progbits
119
        .type   g_pfnVectors, %object
120
        .size   g_pfnVectors, .-g_pfnVectors
121
    
122
    
123
g_pfnVectors:
124
        .word   _estack
125
        .word   Reset_Handler
126
        .word   NMI_Handler
127
        .word   HardFault_Handler
128
        .word   MemManage_Handler
129
        .word   BusFault_Handler
130
        .word   UsageFault_Handler
131
        .word   0
132
        .word   0
133
        .word   0
134
        .word   0
135
        .word   SVC_Handler
136
        .word   DebugMon_Handler
137
        .word   0
138
        .word   PendSV_Handler
139
        .word   SysTick_Handler
140
        .word   WWDG_IRQHandler
141
        .word   PVD_IRQHandler
142
        .word   TAMPER_IRQHandler
143
        .word   RTC_IRQHandler
144
        .word   FLASH_IRQHandler
145
        .word   RCC_IRQHandler
146
        .word   EXTI0_IRQHandler
147
        .word   EXTI1_IRQHandler
148
        .word   EXTI2_IRQHandler
149
        .word   EXTI3_IRQHandler
150
        .word   EXTI4_IRQHandler
151
        .word   DMA1_Channel1_IRQHandler
152
        .word   DMA1_Channel2_IRQHandler
153
        .word   DMA1_Channel3_IRQHandler
154
        .word   DMA1_Channel4_IRQHandler
155
        .word   DMA1_Channel5_IRQHandler
156
        .word   DMA1_Channel6_IRQHandler
157
        .word   DMA1_Channel7_IRQHandler
158
        .word   ADC1_2_IRQHandler
159
        .word   USB_HP_CAN1_TX_IRQHandler
160
        .word   USB_LP_CAN1_RX0_IRQHandler
161
        .word   CAN1_RX1_IRQHandler
162
        .word   CAN1_SCE_IRQHandler
163
        .word   EXTI9_5_IRQHandler
164
        .word   TIM1_BRK_IRQHandler
165
        .word   TIM1_UP_IRQHandler
166
        .word   TIM1_TRG_COM_IRQHandler
167
        .word   TIM1_CC_IRQHandler
168
        .word   TIM2_IRQHandler
169
        .word   TIM3_IRQHandler
170
        .word   TIM4_IRQHandler
171
        .word   I2C1_EV_IRQHandler
172
        .word   I2C1_ER_IRQHandler
173
        .word   I2C2_EV_IRQHandler
174
        .word   I2C2_ER_IRQHandler
175
        .word   SPI1_IRQHandler
176
        .word   SPI2_IRQHandler
177
        .word   USART1_IRQHandler
178
        .word   USART2_IRQHandler
179
        .word   USART3_IRQHandler
180
        .word   EXTI15_10_IRQHandler
181
        .word   RTCAlarm_IRQHandler
182
        .word   USBWakeUp_IRQHandler    
183
  .word 0
184
        .word   0
185
        .word   0
186
        .word   0
187
        .word   0
188
        .word   0
189
        .word   0
190
        .word   BootRAM          /* @0x108. This is for boot in RAM mode for 
191
                            STM32F10x Medium Density devices. */
192
   
193
/*******************************************************************************
194
*
195
* Provide weak aliases for each Exception handler to the Default_Handler. 
196
* As they are weak aliases, any function with the same name will override 
197
* this definition.
198
*
199
*******************************************************************************/
200
    
201
  .weak NMI_Handler
202
        .thumb_set NMI_Handler,Default_Handler
203
        
204
  .weak HardFault_Handler
205
        .thumb_set HardFault_Handler,Default_Handler
206
        
207
  .weak MemManage_Handler
208
        .thumb_set MemManage_Handler,Default_Handler
209
        
210
  .weak BusFault_Handler
211
        .thumb_set BusFault_Handler,Default_Handler
212
213
        .weak   UsageFault_Handler
214
        .thumb_set UsageFault_Handler,Default_Handler
215
216
        .weak   SVC_Handler
217
        .thumb_set SVC_Handler,Default_Handler
218
219
        .weak   DebugMon_Handler
220
        .thumb_set DebugMon_Handler,Default_Handler
221
222
        .weak   PendSV_Handler
223
        .thumb_set PendSV_Handler,Default_Handler
224
225
        .weak   SysTick_Handler
226
        .thumb_set SysTick_Handler,Default_Handler
227
228
        .weak   WWDG_IRQHandler
229
        .thumb_set WWDG_IRQHandler,Default_Handler
230
231
        .weak   PVD_IRQHandler
232
        .thumb_set PVD_IRQHandler,Default_Handler
233
234
        .weak   TAMPER_IRQHandler
235
        .thumb_set TAMPER_IRQHandler,Default_Handler
236
237
        .weak   RTC_IRQHandler
238
        .thumb_set RTC_IRQHandler,Default_Handler
239
        .weak   FLASH_IRQHandler
240
        .thumb_set FLASH_IRQHandler,Default_Handler
241
242
        .weak   RCC_IRQHandler
243
        .thumb_set RCC_IRQHandler,Default_Handler
244
245
        .weak   EXTI0_IRQHandler
246
        .thumb_set EXTI0_IRQHandler,Default_Handler
247
248
        .weak   EXTI1_IRQHandler
249
        .thumb_set EXTI1_IRQHandler,Default_Handler
250
251
        .weak   EXTI2_IRQHandler
252
        .thumb_set EXTI2_IRQHandler,Default_Handler
253
254
        .weak   EXTI3_IRQHandler
255
        .thumb_set EXTI3_IRQHandler,Default_Handler
256
257
        .weak   EXTI4_IRQHandler
258
        .thumb_set EXTI4_IRQHandler,Default_Handler
259
260
        .weak   DMA1_Channel1_IRQHandler
261
        .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
262
263
        .weak   DMA1_Channel2_IRQHandler
264
        .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
265
266
        .weak   DMA1_Channel3_IRQHandler
267
        .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
268
269
        .weak   DMA1_Channel4_IRQHandler
270
        .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
271
272
        .weak   DMA1_Channel5_IRQHandler
273
        .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
274
275
        .weak   DMA1_Channel6_IRQHandler
276
        .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
277
278
        .weak   DMA1_Channel7_IRQHandler
279
        .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
280
281
        .weak   ADC1_2_IRQHandler
282
        .thumb_set ADC1_2_IRQHandler,Default_Handler
283
284
        .weak   USB_HP_CAN1_TX_IRQHandler
285
        .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
286
287
        .weak   USB_LP_CAN1_RX0_IRQHandler
288
        .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
289
290
        .weak   CAN1_RX1_IRQHandler
291
        .thumb_set CAN1_RX1_IRQHandler,Default_Handler
292
293
        .weak   CAN1_SCE_IRQHandler
294
        .thumb_set CAN1_SCE_IRQHandler,Default_Handler
295
296
        .weak   EXTI9_5_IRQHandler
297
        .thumb_set EXTI9_5_IRQHandler,Default_Handler
298
299
        .thumb_set EXTI9_5_IRQHandler,Default_Handler
300
301
        .weak   TIM1_BRK_IRQHandler
302
        .thumb_set TIM1_BRK_IRQHandler,Default_Handler
303
304
        .weak   TIM1_UP_IRQHandler
305
        .thumb_set TIM1_UP_IRQHandler,Default_Handler
306
307
        .weak   TIM1_TRG_COM_IRQHandler
308
        .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
309
310
        .weak   TIM1_CC_IRQHandler
311
        .thumb_set TIM1_CC_IRQHandler,Default_Handler
312
313
        .weak   TIM2_IRQHandler
314
        .thumb_set TIM2_IRQHandler,Default_Handler
315
316
        .weak   TIM3_IRQHandler
317
        .thumb_set TIM3_IRQHandler,Default_Handler
318
319
        .weak   TIM4_IRQHandler
320
        .thumb_set TIM4_IRQHandler,Default_Handler
321
322
        .weak   I2C1_EV_IRQHandler
323
        .thumb_set I2C1_EV_IRQHandler,Default_Handler
324
325
        .weak   I2C1_ER_IRQHandler
326
        .thumb_set I2C1_ER_IRQHandler,Default_Handler
327
328
        .weak   I2C2_EV_IRQHandler
329
        .thumb_set I2C2_EV_IRQHandler,Default_Handler
330
331
        .weak   I2C2_ER_IRQHandler
332
        .thumb_set I2C2_ER_IRQHandler,Default_Handler
333
334
        .weak   SPI1_IRQHandler
335
        .thumb_set SPI1_IRQHandler,Default_Handler
336
337
        .weak   SPI2_IRQHandler
338
        .thumb_set SPI2_IRQHandler,Default_Handler
339
340
        .weak   USART1_IRQHandler
341
        .thumb_set USART1_IRQHandler,Default_Handler
342
343
        .weak   USART2_IRQHandler
344
        .thumb_set USART2_IRQHandler,Default_Handler
345
346
        .weak   USART3_IRQHandler
347
        .thumb_set USART3_IRQHandler,Default_Handler
348
349
        .weak   EXTI15_10_IRQHandler
350
        .thumb_set EXTI15_10_IRQHandler,Default_Handler
351
352
        .weak   RTCAlarm_IRQHandler
353
        .thumb_set RTCAlarm_IRQHandler,Default_Handler
354
355
        .weak   USBWakeUp_IRQHandler
356
        .thumb_set USBWakeUp_IRQHandler,Default_Handler
357
358
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/

..was auch ausführbaren Code erzeugt. Irgendwas mit den Systemclocks 
stimmt aber nicht nicht, mein systick läuft entweder zu schnell oder gar 
nicht (Led ist als ständiges Leuchten statt als blinkern zu sehen, muß 
mal nen Oszi dranhalten), die Uarts scheinen aber mit der vorgesehenen 
Baudrate zu laufen..mal gucken..

Gruß,

Holm

von Holm T. (Gast)


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Ok..es gab jetzt einen SysTickHandler() und einen 
SysTick_Handler()...wie witzig...

Gruß,

Holm

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