Der folgende Code läuft auf einem "Digispark" Klon mit ATtiny85 bei 5V
extern (USB ist nicht verbunden).
Wenn ich INPUT mit NC2 low ziehe, schaltet OUTPUT für 204 ms ein - nicht
für 8 Sekunden.
Stimmt etwas mit der Watchdog-Konfiguration nicht, oder woran kann's
noch liegen?
1 | // Microchip / Atmel AVR ATtinyx5
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2 | //
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3 |
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4 | //#define F_CPU 1000000 // 8MHz/8 CLKDIV8 (default, fuse sets prescaler in CLKPR, can be overwritten)
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5 | #define F_CPU 16500000 // 16.5 MHz: PLL overclocked by micronucleus USB bootloader (USB sync.)
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6 |
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7 |
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8 | // C types
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9 | #include <stdint.h>
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10 |
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11 | // AVR-libc
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12 | #include <avr/io.h>
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13 | #include <avr/sleep.h>
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14 | #include <avr/interrupt.h>
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15 | #include <avr/wdt.h>
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16 | #include <util/delay.h>
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17 |
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18 |
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19 | // IO
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20 | // #RESET PB5 1 8 VCC
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21 | // PB3 2 7 PB2
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22 | // PB4 3 6 PB1
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23 | // GND 4 5 PB0
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24 | #define NC0 (1<<PB0) // 5 (MOSI/DI/SDA/AIN0/OC0A/#OC1A/AREF/PCINT0)
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25 | #define LED (1<<PB1) // 6 (MISO/DO/AIN1/OC0B/OC1A/PCINT1)
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26 | #define NC2 (1<<PB2) // 7 (SCK/USCK/SCL/ADC1/T0/INT0/PCINT2)
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27 | #define INPUT (1<<PB3) // 2 (PCINT3/XTAL1/CLKI/#OC1B/ADC3)
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28 | #define OUTPUT (1<<PB4) // 3 (PCINT4/XTAL2/CLKO/OC1B/ADC2)
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29 | // // 1 (PCINT5/#RESET/ADC0/dW)
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30 | // 4 GND
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31 | // 8 VCC
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32 |
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33 |
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34 | ISR(PCINT0_vect) {
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35 | GIMSK = 0; // stop PCIE
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36 | PORTB |= (LED | OUTPUT); // debug
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37 | WDTCR = (1<<WDIE) | WDTO_8S; // enable WDT
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38 | }
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39 |
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40 |
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41 | ISR(WDT_vect) {
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42 | wdt_disable(); // stop WDT
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43 | PORTB &= ~(LED | OUTPUT); // debug
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44 | GIMSK = (1<<PCIE); // enable interrupt
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45 | }
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46 |
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47 |
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48 | int main(void) {
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49 |
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50 | MCUSR = 0; // reset status
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51 | GIFR = 0xFF; // clear interrupt flags
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52 |
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53 | // low power
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54 | wdt_disable(); // stop WDT
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55 | sleep_bod_disable(); // BOD
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56 | ACSR |= (1<<ACD); // analog comparator
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57 | PRR |= (1<<PRTIM0) | (1<<PRTIM1) | (1<<PRUSI) | (1<<PRADC);
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58 |
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59 | // output(s)
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60 | DDRB = (LED | OUTPUT | NC0 | NC2); //
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61 | PORTB = 0;
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62 |
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63 | // hello world
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64 | for (uint8_t n=0; n<6; n++) {
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65 | PORTB ^= LED;
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66 | _delay_ms(200);
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67 | }
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68 |
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69 | // enable pin change interrupt
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70 | GIFR |= (1<<PCIF); // the flag can be cleared by writing a logical one to it
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71 | GIMSK = (1<<PCIE); //
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72 | PCMSK = (1<<PCINT3); //
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73 |
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74 | // power down
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75 | set_sleep_mode(SLEEP_MODE_PWR_DOWN);
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76 | sleep_enable();
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77 | sei();
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78 | while (1) {
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79 | sleep_cpu();
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80 | //sleep_disable();
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81 | }
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82 | }
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