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LOG/iC™ SOFTWARE 

LOG/iC is a PLD synthesis tool featuring all the high level 

design entry formats required for easy and efficient designs. 

LOG/iC's HYPERPLD concept allows the user to first enter, 

simulate and process and design, without a need to pinpoint 

a specific device. 

The proprietary PLD optimizer used for logic reduction is an 

exact PLD optimizer that is fast enough to be applicable for 

large designs. So, the actual minimal number of product 

terms is found, ensuring the most cost-effective hardware 

After the reduction process, LOG/iC's PLD Data Base may 

be used to select the best device for the application. This 

selection process is based on the results of the HYPERPLD 

optimization as well as on additional interactive parameters 

like speed, power consumption, packaging, etc. 

LOG/iC supports the mainline PALs, GALs as well as ECL 

devices. The library of supported parts is updated regularly. 

There is also a LOG/iC-GATES compiler available which 

accepts the same PLD design files assuring an easy growth 

path to gate array designs. 

LOG/iC is available on a number of hosts like IBM-PC, 

SUN3, SUN4, SUN386, APOLLO, HP-9000 and VAX work- 

stations/mainframes. On all hosts, LOG/iC is operated 

through the same menu driven interface with online help 

available. An integrated communications program eases the 

device programmer operation and the downloading of 

JEDEC files.