1 | /*
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2 | * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
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3 | *
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4 | * SPDX-License-Identifier: Unlicense OR CC0-1.0
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5 | */
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6 |
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7 | #include <stdint.h>
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8 | #include <stdlib.h>
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9 | #include "freertos/FreeRTOS.h"
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10 | #include "freertos/task.h"
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11 | #include "driver/i2s_std.h"
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12 | #include "driver/gpio.h"
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13 | #include "esp_check.h"
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14 | #include "sdkconfig.h"
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15 | #include "i2s_example_pins.h"
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16 | #include <math.h>
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17 |
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18 |
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19 | /* Set 1 to allocate rx & tx channels in duplex mode on a same I2S controller, they will share the BCLK and WS signal
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20 | * Set 0 to allocate rx & tx channels in simplex mode, these two channels will be totally separated,
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21 | * Specifically, due to the hardware limitation, the simplex rx & tx channels can't be registered on the same controllers on ESP32 and ESP32-S2,
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22 | * and ESP32-S2 has only one I2S controller, so it can't allocate two simplex channels */
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23 | #define EXAMPLE_I2S_DUPLEX_MODE CONFIG_USE_DUPLEX
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24 |
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25 | #define EXAMPLE_STD_BCLK_IO1 EXAMPLE_I2S_BCLK_IO1 // I2S bit clock io number
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26 | #define EXAMPLE_STD_WS_IO1 EXAMPLE_I2S_WS_IO1 // I2S word select io number
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27 | #define EXAMPLE_STD_DOUT_IO1 EXAMPLE_I2S_DOUT_IO1 // I2S data out io number
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28 | #define EXAMPLE_STD_DIN_IO1 EXAMPLE_I2S_DIN_IO1 // I2S data in io number
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29 | #if !EXAMPLE_I2S_DUPLEX_MODE
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30 | #define EXAMPLE_STD_BCLK_IO2 EXAMPLE_I2S_BCLK_IO2 // I2S bit clock io number
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31 | #define EXAMPLE_STD_WS_IO2 EXAMPLE_I2S_WS_IO2 // I2S word select io number
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32 | #define EXAMPLE_STD_DOUT_IO2 EXAMPLE_I2S_DOUT_IO2 // I2S data out io number
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33 | #define EXAMPLE_STD_DIN_IO2 EXAMPLE_I2S_DIN_IO2 // I2S data in io number
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34 | #endif
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35 |
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36 | #define EXAMPLE_BUFF_SIZE 2048
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37 | #define SAMPLE_RATE 22050
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38 |
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39 | static i2s_chan_handle_t tx_chan; // I2S tx channel handler
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40 | static i2s_chan_handle_t rx_chan; // I2S rx channel handler
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41 |
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42 | static void i2s_example_read_task(void *args)
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43 | {
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44 | uint8_t *r_buf = (uint8_t *)calloc(1, EXAMPLE_BUFF_SIZE);
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45 | assert(r_buf); // Check if r_buf allocation success
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46 | size_t r_bytes = 0;
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47 |
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48 | /* Enable the RX channel */
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49 | ESP_ERROR_CHECK(i2s_channel_enable(rx_chan));
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50 |
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51 | /* ATTENTION: The print and delay in the read task only for monitoring the data by human,
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52 | * Normally there shouldn't be any delays to ensure a short polling time,
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53 | * Otherwise the dma buffer will overflow and lead to the data lost */
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54 | while (1) {
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55 | /* Read i2s data */
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56 | if (i2s_channel_read(rx_chan, r_buf, EXAMPLE_BUFF_SIZE, &r_bytes, 1000) == ESP_OK) {
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57 | printf("Read Task: i2s read %d bytes\n-----------------------------------\n", r_bytes);
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58 | printf("[0] %x [1] %x [2] %x [3] %x\n[4] %x [5] %x [6] %x [7] %x\n\n",
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59 | r_buf[0], r_buf[1], r_buf[2], r_buf[3], r_buf[4], r_buf[5], r_buf[6], r_buf[7]);
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60 | } else {
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61 | printf("Read Task: i2s read failed\n");
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62 | }
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63 | vTaskDelay(pdMS_TO_TICKS(200));
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64 | }
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65 | free(r_buf);
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66 | vTaskDelete(NULL);
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67 | }
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68 |
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69 | static void i2s_example_write_task(void *args)
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70 | {
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71 | uint8_t *w_buf = (uint8_t *)calloc(1, EXAMPLE_BUFF_SIZE);
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72 | assert(w_buf); // Check if w_buf allocation success
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73 |
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74 | for (int i = 0; i < EXAMPLE_BUFF_SIZE / 2; i++) {
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75 | float phase = (2.0f * M_PI * i) / (SAMPLE_RATE / 220);
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76 | int16_t sample = (int16_t)(127 * sinf(phase));
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77 | w_buf[i] = sample; // Kein MSB nötig bei 8 Bit
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78 | w_buf[2 * i + 1] = (sample >> 8) & 0xFF; // MSB
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79 | }
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80 |
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81 |
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82 | size_t w_bytes = EXAMPLE_BUFF_SIZE;
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83 |
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84 | /* (Optional) Preload the data before enabling the TX channel, so that the valid data can be transmitted immediately */
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85 | while (w_bytes == EXAMPLE_BUFF_SIZE) {
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86 | /* Here we load the target buffer repeatedly, until all the DMA buffers are preloaded */
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87 | ESP_ERROR_CHECK(i2s_channel_preload_data(tx_chan, w_buf, EXAMPLE_BUFF_SIZE, &w_bytes));
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88 | }
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89 |
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90 | /* Enable the TX channel */
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91 | ESP_ERROR_CHECK(i2s_channel_enable(tx_chan));
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92 | while (1) {
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93 | /* Write i2s data */
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94 | if (i2s_channel_write(tx_chan, w_buf, EXAMPLE_BUFF_SIZE, &w_bytes, 1000) == ESP_OK) {
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95 | printf("Write Task: i2s write %d bytes\n", w_bytes);
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96 | } else {
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97 | printf("Write Task: i2s write failed\n");
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98 | }
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99 | vTaskDelay(pdMS_TO_TICKS(200));
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100 | }
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101 | free(w_buf);
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102 | vTaskDelete(NULL);
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103 | }
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104 |
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105 | static void i2s_example_init_std_simplex(void)
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106 | {
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107 | /* Setp 1: Determine the I2S channel configuration and allocate two channels one by one
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108 | * The default configuration can be generated by the helper macro,
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109 | * it only requires the I2S controller id and I2S role
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110 | * The tx and rx channels here are registered on different I2S controller,
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111 | * Except ESP32 and ESP32-S2, others allow to register two separate tx & rx channels on a same controller */
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112 | i2s_chan_config_t tx_chan_cfg = I2S_CHANNEL_DEFAULT_CONFIG(I2S_NUM_AUTO, I2S_ROLE_MASTER);
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113 | ESP_ERROR_CHECK(i2s_new_channel(&tx_chan_cfg, &tx_chan, NULL));
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114 | i2s_chan_config_t rx_chan_cfg = I2S_CHANNEL_DEFAULT_CONFIG(I2S_NUM_AUTO, I2S_ROLE_MASTER);
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115 | ESP_ERROR_CHECK(i2s_new_channel(&rx_chan_cfg, NULL, &rx_chan));
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116 |
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117 | /* Step 2: Setting the configurations of standard mode and initialize each channels one by one
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118 | * The slot configuration and clock configuration can be generated by the macros
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119 | * These two helper macros is defined in 'i2s_std.h' which can only be used in STD mode.
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120 | * They can help to specify the slot and clock configurations for initialization or re-configuring */
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121 |
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122 |
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123 |
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124 |
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125 | i2s_std_config_t std_cfg = {
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126 | .clk_cfg = {
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127 | .sample_rate_hz = SAMPLE_RATE,
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128 | .clk_src = I2S_CLK_SRC_DEFAULT,
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129 | .mclk_multiple = I2S_MCLK_MULTIPLE_256
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130 | },
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131 | .slot_cfg = {
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132 | .data_bit_width = I2S_DATA_BIT_WIDTH_16BIT,
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133 | .slot_bit_width = I2S_SLOT_BIT_WIDTH_16BIT,
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134 | .slot_mode = I2S_SLOT_MODE_STEREO,
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135 | .slot_mask = I2S_STD_SLOT_BOTH,
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136 | .ws_width = I2S_DATA_BIT_WIDTH_16BIT,
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137 | .ws_pol = false,
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138 | .bit_shift = true,
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139 | .msb_right = false
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140 | },
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141 | .gpio_cfg = {
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142 | .mclk = I2S_GPIO_UNUSED,
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143 | .bclk = GPIO_NUM_5,
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144 | .ws = GPIO_NUM_25,
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145 | .dout = GPIO_NUM_26,
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146 | .din = I2S_GPIO_UNUSED,
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147 | .invert_flags = {
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148 | .mclk_inv = false,
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149 | .bclk_inv = false,
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150 | .ws_inv = false
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151 | }
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152 | }
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153 | };
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154 |
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155 | ESP_ERROR_CHECK(i2s_channel_init_std_mode(tx_chan, &std_cfg));
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156 |
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157 |
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158 | i2s_std_config_t rx_std_cfg = {
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159 | .clk_cfg = I2S_STD_CLK_DEFAULT_CONFIG(22050),
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160 | .slot_cfg = I2S_STD_MSB_SLOT_DEFAULT_CONFIG(I2S_DATA_BIT_WIDTH_16BIT, I2S_SLOT_MODE_MONO),
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161 | .gpio_cfg = {
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162 | .mclk = I2S_GPIO_UNUSED, // some codecs may require mclk signal, this example doesn't need it
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163 | .bclk = EXAMPLE_STD_BCLK_IO2,
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164 | .ws = EXAMPLE_STD_WS_IO2,
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165 | .dout = EXAMPLE_STD_DOUT_IO2,
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166 | .din = EXAMPLE_STD_DIN_IO2,
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167 | .invert_flags = {
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168 | .mclk_inv = false,
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169 | .bclk_inv = false,
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170 | .ws_inv = false,
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171 | },
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172 | },
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173 | };
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174 | /* Default is only receiving left slot in mono mode,
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175 | * update to right here to show how to change the default configuration */
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176 | rx_std_cfg.slot_cfg.slot_mask = I2S_STD_SLOT_RIGHT;
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177 | ESP_ERROR_CHECK(i2s_channel_init_std_mode(rx_chan, &rx_std_cfg));
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178 | }
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179 |
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180 |
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181 | extern "C" void app_main(void)
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182 | {
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183 | #if EXAMPLE_I2S_DUPLEX_MODE
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184 | i2s_example_init_std_duplex();
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185 | #else
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186 | i2s_example_init_std_simplex();
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187 | #endif
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188 |
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189 | /* Step 3: Create writing and reading task, enable and start the channels */
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190 | xTaskCreate(i2s_example_read_task, "i2s_example_read_task", 4096, NULL, 5, NULL);
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191 | xTaskCreate(i2s_example_write_task, "i2s_example_write_task", 4096, NULL, 5,
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