1 | //--------------------------------------------------------------------------------------------------------
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2 | // Software
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3 | //
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4 | // Ver 2.0 test writeEEPROM / rearEEPROM functions
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5 | //
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6 | // Working on a MSP430 F2013 (eZ430 Development Tool
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7 | // IAR Kickstart version 4.11
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8 | //--------------------------------------------------------------------------------------------------------
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9 |
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10 | //--------------------------------------------------------------------------------------------------------
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11 | // Include Headers
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12 | //--------------------------------------------------------------------------------------------------------
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13 | #include <io430x20x3.h> // Header file for this device
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14 | #include <intrinsics.h> // Intrinsic functions
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15 | #include <stdint.h> // Integers of defined sizes
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16 |
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17 | //--------------------------------------------------------------------------------------------------------
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18 | // Define Fixed variables
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19 | //--------------------------------------------------------------------------------------------------------
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20 |
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21 | #define DI1 P1IN_bit.P1IN_2 // Digital Input 1 = P1.2 IN ***not fixed yet
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22 | #define D_OUT P1IN_bit.P1IN_7 // D_OUT from SL13A (when needed as input)
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23 |
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24 | #define DI1IE P1IE_bit.P1IE_2 // Digital Input 1 = P1.2 IN ***not fixed yet
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25 | #define D_OUTIE P1IE_bit.P1IE_7 // D_OUT from SL13A (when needed as input)
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26 |
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27 | #define DI1IFG P1IFG_bit.P1IFG_2 // Digital Input 1 = P1.2 IN ***not fixed yet
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28 | #define D_OUTIFG P1IFG_bit.P1IFG_7 // D_OUT from SL13A (when needed as input)
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29 |
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30 | #define DI1IES P1IES_bit.P1IES_2 // Digital Input 1 = P1.2 IN ***not fixed yet
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31 | #define D_OUTIES P1IES_bit.P1IES_7 // D_OUT from SL13A (when needed as input)
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32 |
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33 |
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34 | //--------------------------------------------------------------------------------------------------------
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35 | // Initialize Functions
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36 | //--------------------------------------------------------------------------------------------------------
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37 |
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38 | void HW_init(void);
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39 | void readEEPROM(void);
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40 | void writeEEPROM(void);
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41 |
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42 | //--------------------------------------------------------------------------------------------------------
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43 | // Initialize variables
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44 | //--------------------------------------------------------------------------------------------------------
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45 |
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46 | unsigned short ob[6]; // Define place for data of Online Block
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47 | int ICF = 0; // Input Changed Flag
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48 | int ECF = 0; // EEPROM Changed Flag
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49 |
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50 |
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51 |
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52 | //--------------------------------------------------------------------------------------------------------
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53 | // Main
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54 | //--------------------------------------------------------------------------------------------------------
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55 |
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56 | void main (void)
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57 | {
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58 |
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59 | HW_init(); // Initalize Hardware
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60 |
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61 | readEEPROM(); // test write EEPROM
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62 |
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63 | }
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64 |
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65 |
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66 | //--------------------------------------------------------------------------------------------------------
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67 | // Define Functions
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68 | //--------------------------------------------------------------------------------------------------------
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69 |
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70 | //-------------------------------------------------------------------------------------------Initalisation
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71 | //Initializes all the ports and setting
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72 | void HW_init(void){
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73 | // Setup clocks
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74 | WDTCTL = WDTPW | WDTHOLD; // stop Watchdog
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75 | BCSCTL1 = CALBC1_8MHZ; // Calibrated range for DCO
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76 | DCOCTL = CALDCO_8MHZ; // Calibrated tap and modulation
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77 | BCSCTL3 = LFXT1S_2; // ACLK from VLO (12Khz)
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78 | BCSCTL2 = DIVS_3; // SMCLK = DCO/8 = 1MHz
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79 | // Configure ports
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80 |
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81 | P1OUT = 0; // pre clear Buffer
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82 | P1DIR = BIT5 | BIT6; // all inputs (initally, then overwrited by SPI)
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83 | P1REN = BIT0|BIT1|BIT2|BIT3|BIT4|BIT7; // Pull resistors on unused pins
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84 |
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85 | P2SEL = 0; // Digital i/o rather than crystal
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86 | P2OUT = 0; // preclear output buffer
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87 | P2DIR = BIT6; // set P2.6 Output
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88 | P2REN = BIT7; // Pull resistors on P2.7
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89 | }
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90 |
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91 | //---------------------------------------------------------------------------------------------Read EEPROM
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92 | //reads the online Block on the EEPROM and returns the value
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93 | void readEEPROM(void){
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94 | int i;
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95 | ob[0] = 0x41; // read Command code for SPI communication
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96 | ob[1] = 0x01; // Address for SPI communication **to define!
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97 | D_OUTIE = 0;
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98 | //Init USI
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99 | // Enable SDI, SDO, SCLK, msb first, master, enable output, latch data
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100 | USICTL0 = USIPE7 | USIPE6 | USIPE5 | USIMST | USIOE | USISWRST;
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101 | // Write then read (CPHA = 1 -> CKPH = 0), SPI not I2C, enable interrupt
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102 | USICTL1 = USIIE | USIIFG; // Can't clear USIIE in reset mode
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103 | USICKCTL = USIDIV_0 | USISSEL_3; // SCLK = SMCLK, clock idles low (CPOL = CKPL = 0)
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104 | USICTL0 &= ~USISWRST; // Release USI from reset
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105 | USICTL1 &= ~USIIFG; // Avoid unwanted interrupt (clear pending IE)
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106 | //send request
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107 | for (i=0; i<6; i++){ // for 6 times (1 command, 1 address, 4 data)
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108 |
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109 | USISRL = ob[i]; // Write variable value to Shift Register
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110 | USICNT = 8; // Start SPI to transfer 8 bits
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111 | __low_power_mode_0();
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112 |
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113 | }
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114 | //send 'Execute'
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115 | USICNT = 1; // Start SPI to transfer 1 bit (execute)
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116 | __low_power_mode_0();
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117 | //stop USI
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118 | USICTL1 &= ~USIIE; // disable SPI Interrupts
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119 | USICTL0 &= ~USIPE7; // disable SDI -> P1.7 Input
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120 | //wait Ready
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121 | P1IFG = 0; // clear pending interrupts
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122 | D_OUTIE = 1; // enable interrupt
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123 | D_OUTIES = 0; // Sensitive on rising edge
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124 | __low_power_mode_0(); // power down until interrupt released
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125 | ECF = 0; // clear ECF (changed EEPROM on purpose)
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126 | //send ACK
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127 | D_OUTIE = 0; // disable Port interrupt
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128 | USICTL0 |= USIPE7; // enable SDI
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129 | USICTL1 |= USIIE; // enable SPI Interrupts
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130 | USICNT = 1; // send one clock (USICNT = 1)
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131 | __low_power_mode_0();
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132 |
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133 | for (i=2; i<6; i++){ // for 4 times
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134 | USICNT = 8; // send 8 clocks
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135 | __low_power_mode_0(); // wait until done...
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136 | ob[i] = USISRL; // ...and save the value
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137 | }
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138 | //stop USI
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139 | //USICTL0 |= USISWRST; // reset USI (??? needed?)
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140 | USICTL1 &= ~USIIE; // disable SPI Interrupts
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141 | USICTL0 &= ~USIPE7; // disable SDI -> P1.7 Input
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142 | //wait for ACK
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143 | P1IFG = 0; // clear pending interrupts
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144 | D_OUTIE = 1; // enable interrupt
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145 | D_OUTIES = 0; // Sensitive on rising edge
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146 | __low_power_mode_0(); // power down until interrupt released
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147 | ECF = 0; // clear ECF (changed EEPROM on purpose)
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148 | }
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149 | //--------------------------------------------------------------------------------------------Write EEPROM
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150 | //writes the given value on the Online Block of the EEPROM
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151 | void writeEEPROM(void){
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152 | int i;
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153 | ob[0] = 0x81; // write Command code for SPI communication
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154 | ob[1] = 0x01; // Address for SPI communication **to define!
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155 | ob[2] = 0x74; // Preload random numbers
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156 | ob[3] = 0x36;
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157 | ob[4] = 0xF8;
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158 | ob[5] = 0xA5;
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159 | D_OUTIE = 0; // disable interrupt
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160 | //Init USI
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161 | // Enable SDI, SDO, SCLK, msb first, master, enable output, latch data
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162 | USICTL0 = USIPE7 | USIPE6 | USIPE5 | USIMST | USIOE | USISWRST;
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163 | // Write then read (CPHA = 1 -> CKPH = 0), SPI not I2C, enable interrupt
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164 | USICTL1 = USIIE | USIIFG; // Can't clear USIIE in reset mode
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165 | USICKCTL = USIDIV_0 | USISSEL_3; // SCLK = SMCLK, clock idles low (CPOL = CKPL = 0)
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166 | USICTL0 &= ~USISWRST; // Release USI from reset
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167 | USICTL1 &= ~USIIFG; // Avoid unwanted interrupt (clear pending IE)
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168 | //send request
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169 | for (i=0; i<6; i++){ // for 6 times (1 command, 1 address, 4 data)
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170 |
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171 | USISRL = ob[i]; // Write variable value to Shift Register
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172 | USICNT = 8; // Start SPI to transfer 8 bits
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173 | __low_power_mode_0();
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174 |
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175 |
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176 | }
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177 | //send 'Execute'
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178 | USICNT = 1; // Start SPI to transfer 1 bit (execute)
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179 | __low_power_mode_0();
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180 |
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181 | //stop USI
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182 | //USICTL0 |= USISWRST; // reset USI (??? needed?)
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183 | USICTL1 &= ~USIIE; // disable SPI Interrupts
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184 | USICTL0 &= ~USIPE7; // disable SDI -> P1.7 Input
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185 | //wait for ACK
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186 | P1IFG = 0; // clear pending interrupts
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187 | D_OUTIE = 1; // enable interrupt
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188 | D_OUTIES = 0; // Sensitive on rising edge
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189 | __low_power_mode_0(); // power down until interrupt released
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190 | ECF = 0; // clear ECF (changed EEPROM on purpose)
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191 | return;
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192 | }
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193 |
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194 |
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195 | //--------------------------------------------------------------------------------------------------------
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196 | // ISR for USI: clear flag and exit
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197 | //--------------------------------------------------------------------------------------------------------
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198 | #pragma vector = USI_VECTOR
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199 | __interrupt void USI_ISR (void)
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200 | {
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201 | USICTL1 &= ~USIIFG; // Clear flag
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202 | __low_power_mode_off_on_exit(); // leave LPM0 on exit
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203 |
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204 | }
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205 |
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206 | //--------------------------------------------------------------------------------------------------------
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207 | // ISR for Inputs on P1
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208 | //--------------------------------------------------------------------------------------------------------
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209 | #pragma vector = PORT1_VECTOR
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210 | __interrupt void PORT1_ISR (void) // NOT acknowledged automatically
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211 | {
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212 | if(D_OUTIFG){ // P1.7 relased
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213 | ECF = 1; // set EEPROM Changed Flag
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214 | }
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215 | else if(DI1IFG){ // P1.0 relased
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216 | ob[3] ^= BIT6 ; // toggle bit in ob[] ***modify numbers!
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217 | DI1IES ^= 1; // Toggle sensitive edge (rising <-> falling)
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218 | ICF = 1; // set 'Input Changed Flag'
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219 | }
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220 |
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221 |
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222 |
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223 | do{
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224 | P1IFG = 0; // Clear any pending interrupt...
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225 | } while(P1IFG != 0); // ...until none remain
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226 |
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227 | __low_power_mode_off_on_exit(); // leave LPM0 on exit
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228 |
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229 | }
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