1 | void TD_Init( void )
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2 | { // Called once at startup
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3 | ...
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4 | // 16-bit bus (WORDWIDE=1)...
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5 | SYNCDELAY; //
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6 | EP2FIFOCFG = 0x01;
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7 | SYNCDELAY; //
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8 | EP6FIFOCFG = 0x05;
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9 | ...
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10 | }
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11 |
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12 | ...
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13 |
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14 | void TD_Poll( void )
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15 | { // Called repeatedly while the device is idle
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16 | BYTE dummy = 0;
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17 |
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18 | // Handle OUT data...
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19 |
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20 | // is the host sending data...
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21 | if( !( EP2468STAT & 0x01 ) )
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22 | {
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23 | // EP2EF=0, when endp buffer "not" empty
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24 |
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25 | // ...at this point the pkt. switched from the usb domain to the cpu domain
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26 |
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27 | // if the host sent a pkt... then a buffer was available
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28 | // AUTOOUT=0, so pass pkt. to peripheral domain - (GPIF)
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29 | SYNCDELAY; //
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30 | EP2BCL = 0x00; // w/skip=0
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31 |
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32 | }
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33 | else
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34 | {
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35 | // host is "not" sending data...
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36 | }
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37 |
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38 | if ( write_mode == TRUE )
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39 | {
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40 | // is the peripheral interface idle...
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41 | if( GPIFTRIG & 0x80 )
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42 | {
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43 | // DONE=1, when GPIF is "idle"
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44 |
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45 | // check if there's a pkt in the peripheral domain...
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46 | if( EP24FIFOFLGS & 0x02 )
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47 | {
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48 | // ...EF=1 when buffer "empty", no more data to xfr.
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49 | }
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50 | else
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51 | {
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52 | // EF=0, when slave fifo is "not empty"
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53 | // ...the cpu passed the pkt. to the peripheral domain
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54 |
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55 | // check if peripheral "not full"...
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56 | // if( GPIFREADYSTAT & 0x02 )
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57 | {
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58 | // RDY1=1, when peripheral is "not" FULL (tied to peripheral "full" flag)
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59 |
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60 | // xFIFOTC_OUT = ( ( EP2FIFOBCH << 8 ) + EP2FIFOBCL );
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61 |
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62 | // setup GPIF transaction count
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63 | SYNCDELAY; //
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64 | EP2GPIFTCH = EP2FIFOBCH;
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65 | SYNCDELAY;
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66 | EP2GPIFTCL = EP2FIFOBCL;
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67 |
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68 | // trigger FIFO write transaction(s), using SFR
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69 | // R/W=0, EP[1:0]=00 for EP2 write(s)
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70 | SYNCDELAY;
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71 | GPIFTRIG = GPIFTRIGWR | GPIF_EP2;
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72 |
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73 | // NOTE: 512 bytes transfers in ~75usec on 8-bit async bus
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74 | // ...once master (GPIF) drains OUT pkt, it (re)arms to usb domain
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75 | /*
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76 | if( xFIFOTC_OUT < enum_pkt_size )
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77 | {
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78 | // handle short pkt. to peripheral
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79 |
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80 | // wait for the transaction to terminate naturally...
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81 | while( !( GPIFTRIG & 0x80 ) )
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82 | {
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83 | // should take <75usec @ 8-bit async.
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84 | ; // poll GPIFTRIG.7, DONE bit...
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85 | }
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86 |
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87 | // signal "shortpkt" to peripheral peripheral here...
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88 | }
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89 | else
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90 | {
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91 | // was max. pkt. size...
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92 | // ...let transaction terminate naturally...
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93 | }
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94 | */
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95 | }
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96 | // else
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97 | {
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98 | // RDY1=0, when peripheral is FULL
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99 | }
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100 | }
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101 | }
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102 | else
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103 | {
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104 | // DONE=0 when GPIF is "not" IDLE...
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105 | }
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106 | } else {
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107 |
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108 | if ( EP68FIFOFLGS & 0x01 )
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109 | {
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110 | dummy = LED2_ON;
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111 | } else {
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112 | dummy = LED2_OFF;
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113 | }
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114 | if (( GPIFREADYSTAT & 0x01 ))
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115 | {
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116 | dummy = LED0_ON;
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117 | } else {
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118 | dummy = LED0_OFF;
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119 | }
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120 | if (!( GPIFREADYSTAT & 0x01 ))
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121 | {
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122 | if ( !( GPIFTRIG & 0x80 ) )
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123 | {
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124 | dummy = LED1_ON;
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125 | }
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126 | } else {
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127 | dummy = LED1_OFF;
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128 | }
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129 |
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130 | // Handle IN data...
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131 |
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132 |
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133 | // is the peripheral interface idle...
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134 | if( GPIFTRIG & 0x80 )
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135 | {
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136 | // check if peripheral "not empty"...
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137 | if ( !( GPIFREADYSTAT & 0x01 ) )
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138 | {
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139 | // RDY0=1, when peripheral "not" empty...
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140 |
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141 | if( EP68FIFOFLGS & 0x01 )
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142 | {
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143 | // EP6FF=1, when fifo "full"
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144 | }
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145 | else
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146 | {
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147 | // EP6FF=0, when fifo "not full", buffer available...
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148 |
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149 | // setup GPIF transaction count
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150 | SYNCDELAY; //
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151 | EP6GPIFTCH = 0x00;
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152 | SYNCDELAY;
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153 | EP6GPIFTCL = 0x04;
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154 |
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155 | // trigger FIFO read transaction(s), using SFR
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156 | // R/W=1, EP[1:0]=FIFO_EpNum for EPx read(s)
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157 | SYNCDELAY;
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158 | GPIFTRIG = GPIFTRIGRD | GPIF_EP6;
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159 |
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160 | // NOTE: 512 bytes transfers in ~75usec on 8-bit async bus
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161 | // NOTE: 64 bytes transfers in ~10usec on 8-bit async bus
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162 |
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163 | // wait for the transaction to terminate naturally...
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164 | SYNCDELAY; //
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165 | while( !( GPIFTRIG & 0x80 ) )
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166 | {
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167 | // should take <75usec @ 8-bit async.
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168 | ; // poll GPIFTRIG.7, DONE bit...
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169 | }
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170 |
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171 |
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172 | // AUTOIN=0, so 8051 pass pkt. to host...
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173 | SYNCDELAY; //
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174 | INPKTEND = 0x06; // ...commit however many bytes in pkt.
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175 | // ...NOTE: this also handles "shortpkt"
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176 |
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177 | /* count++;
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178 | XGPIFSGLDATLX = count;
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179 | count++;
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180 | XGPIFSGLDATH = count;
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181 | */
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182 | }
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183 | }
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184 | else
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185 | {
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186 | // master has all the data the peripheral sent...
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187 | }
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188 | }
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189 | else
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190 | {
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191 | // peripheral interface busy...
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192 | }
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193 | }
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194 |
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195 | }
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