1 | library IEEE;
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2 | use IEEE.STD_LOGIC_1164.ALL;
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3 | use IEEE.STD_LOGIC_ARITH.ALL;
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4 | use IEEE.STD_LOGIC_UNSIGNED.ALL;
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5 | use IEEE.NUMERIC_STD.ALL;
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6 |
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7 |
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8 | entity topsound is
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9 | Port (
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10 | clk : in STD_LOGIC;
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11 | button : in STD_LOGIC_Vector(4 downto 1);
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12 | led : out STD_logic_Vector(8 downto 1 );
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13 | audio_out : out STD_LOGIC := '0';
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14 | ramAddress: out STD_LOGIC_VECTOR (16 downto 0 );
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15 | ramData : inout STD_LOGIC_VECTOR (7 downto 0 );
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16 | ramNWE : out STD_LOGIC; -- write enable (beide low aktiv)
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17 | ramNOE : out STD_LOGIC; -- ram data output enable
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18 | top_rs232_rxd : in std_logic; -- RS232 RxD
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19 | top_rs232_txd : out std_logic -- RS232 TxD
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20 | );
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21 | end topsound;
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22 |
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23 | architecture Behavioral of topsound is
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24 |
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25 | component RS232_Interface is
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26 |
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27 | port( clk : in std_logic; -- Systemtakt
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28 | rs232_rxd : in std_logic; -- RS232 RxD
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29 | rs232_tra_en : in std_logic; -- Byte soll auf TxD abgesetzt werden
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30 | rs232_dat_in : in std_logic_vector(7 downto 0); -- auf TxD abzusetzendes Byte
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31 | rs232_txd : out std_logic := '1'; -- RS232 TxD
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32 | rs232_rec_en : out std_logic := '0'; -- Byte wurde über RxD empfangen
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33 | rs232_txd_busy : out std_logic; -- RS232 TxD besetzt
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34 | rs232_dat_out : out std_logic_vector(7 downto 0) -- empfangenes Byte
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35 | );
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36 | end component;
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37 |
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38 | component Sound_PWM is
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39 | Port ( value_in : in STD_LOGIC_VECTOR (7 downto 0);
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40 | clk : in STD_LOGIC;
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41 | pwm_out : out STD_LOGIC);
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42 | end component;
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43 |
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44 | component dbg is
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45 | Port (
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46 | clk : in STD_LOGIC;
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47 | vec_out : out STD_LOGIC_VECTOR (7 downto 0);
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48 | vec_in : in STD_LOGIC_VECTOR (7 downto 0);
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49 | ram_address : out STD_LOGIC_VECTOR (16 downto 0);
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50 | ram_data_in : in STD_LOGIC_VECTOR (7 downto 0);
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51 | ram_data_out : in STD_LOGIC_VECTOR (7 downto 0);
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52 | val_out : out STD_LOGIC_VECTOR (7 downto 0);
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53 | ram_nwe : out STD_LOGIC;
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54 | ram_noe : out STD_LOGIC
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55 | );
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56 | end component;
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57 |
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58 | signal s_rs232_tra_en : std_logic; -- Byte soll auf TxD abgesetzt werden
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59 | signal s_rs232_dat_in : std_logic_vector(7 downto 0); -- auf TxD abzusetzendes Byte
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60 | signal s_rs232_dat_out : std_logic_vector(7 downto 0); -- empfangenes Byte
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61 | signal s_rs232_rec_en : std_logic; -- Byte wurde über RxD empfangen
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62 | signal s_rs232_txd_busy : std_logic; -- RS232 TxD besetzt
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63 | signal s_value : std_logic_vector(7 downto 0);
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64 | signal s_mem_data_out : std_logic_vector(7 downto 0);
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65 | signal s_mem_data_in : std_logic_vector(7 downto 0);
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66 | signal s_c_ram_nwe : std_logic;
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67 | signal s_ram_address : std_logic_vector(16 downto 0);
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68 | signal tmp : std_logic_vector(16 downto 0);
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69 |
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70 | begin
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71 |
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72 | RS232_Interface_impl: RS232_Interface
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73 | port map(
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74 | clk => clk,
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75 | rs232_rxd => top_rs232_rxd,
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76 | rs232_tra_en => s_rs232_tra_en,
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77 | rs232_dat_in => s_rs232_dat_in,
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78 | rs232_txd => top_rs232_txd,
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79 | rs232_rec_en => s_rs232_rec_en,
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80 | rs232_txd_busy => s_rs232_txd_busy,
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81 | rs232_dat_out => s_rs232_dat_out
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82 | );
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83 |
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84 | debug_interface_impl: dbg
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85 | port map
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86 | (
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87 | clk => clk,
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88 | vec_out => s_rs232_dat_in,
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89 | vec_in => s_rs232_dat_out,
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90 | ram_address => s_ram_address,
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91 | ram_data_out=> s_mem_data_out,
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92 | ram_data_in => s_mem_data_in,
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93 | val_out => s_value,
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94 | ram_nwe => s_c_ram_nwe,
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95 | ram_noe => ramNOE
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96 | );
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97 |
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98 | sound_interface_impl: Sound_PWM
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99 | port map(
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100 | value_in => s_value,
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101 | clk => clk,
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102 | pwm_out => audio_out
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103 | );
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104 |
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105 | process (s_mem_data_out, s_c_ram_nwe)
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106 | begin
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107 | if s_c_ram_nwe = '0' then
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108 | ramData <= s_mem_data_out; -- Debug treibt Datenbus
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109 | else
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110 | ramData <= "ZZZZZZZZ"; -- Debug verhält sich passiv
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111 | end if;
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112 | end process;
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113 |
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114 |
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115 | -- Glue Logic
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116 |
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117 | ramNWE <= s_c_ram_nwe;
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118 | s_mem_data_in <= ramData;
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119 | ramAddress <= s_ram_address;
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120 | led(8 downto 1) <= s_value;
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121 |
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122 |
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123 | end Behavioral;
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