EMC design for high power IGBT PCB driver

[flote (Gast)]

Hello folks!

I need to design a PCB driver with a FPGA to manage the control signals 
of several high power IGBT. These IGBTs are going to drive a lot of 
current (around 7000 Amp) and I need to do a robust PCB design.

I have been doing some EMC PCB designs for low power applications 
(maximum 3 Amp) and they are working very well. However I have never 
done a EMC PCB design for very high power application and I have been 
searching some guidelines:

http://www.st.com/st-web-ui/static/active/cn/resource/technical/document/application_note/DM00182773.pdf
http://www.onsemi.com/pub_link/Collateral/AND9071-D.PDF

Therefore I would like to know your opinion about the previous links and 
if there is anything else that should I have into account to do the PCB 
design of this IGBT driver…

Ahh and finally we are planning to use a Spartan 3A from Xilinx to 
handle the IGBT control lines. Xilinx is a good manufacturer for this 
applications or do you think that for this special application there are 
other manufacturers which can me provide me special EMC/EMI FPGAs?

[Sébastien M. (sebi211)]

Just to make this clear: you want to run 7000 amps through a pcb?

[Vn N. (wefwef_s)]

He wrote he wants to run 7kA through an IGBT, not through the PCB. But 
the gate driver PCB will probably be mounted near the high current 
rails:
http://www.ohm.com.tr/images/Product/8ad7ae69-7d54-4bc6-8232-83f92e7deecc_1SD210_ISO3116I.jpg

@TO:
Do you want to design the whole IGBT driver by yourself, or do you want 
build a PCB around an OEM gate driver (like them from CT CONCEPT)? If 
not, I would suffest you to do so.

[Pandur S. (jetztnicht)]

To save the few cents on commercial drivers ?

Ok. Given the 7kA of pulsed current induces false signals into your 
design by magnetic pickup. In order to minimize coupling you have to 
minimize loops, specifically the loop areas. Meaning you have to have 
the relevant traces on the pcb spanning a minimum area. And have the 
cables twisted.