Out Note: Refer to Figure 18-3 for load conditions. 2005 Microchip Technology Inc. DS30487C-page 187 PIC16F87/88 2 TABLE 18-10: I C™ BUS DATA REQUIREMENTS Param. Symbol Characteristic Min Max Units Conditions No. 100* THIGH Clock High Time 100 kHz mode 4.0 — µs 400 kHz mode 0.6 — µs SSP Module 1.5
Figure 91. ADC Prescaler Conversion Timing ADEN START Reset 7-BIT ADC PRESCALER CK 8 / / / / / / / K K K K K K K C C C C C C C ADPS0 ADPS1 ADPS2 ADC CLOCK SOURCE By default, the successive approximation circuitry requires an input clock frequency between 50 kHz and 200 kHz to get maximum resolution.
4 4 4 4 4 6 6 6 6 6 6 6 6 6 6 6 H H H H H H H H H H H C C C C C C C C C C C 1.2 Block Diagram A B K L L G C T R 1 / 0 1 1 D Q K Q K B A / 0 0 E C E C C C T ) B A D D DR D I I O S ) I C S C 3 2 1/ 0 / / Q L W A I A I Q Q Q Q H L I Q K ( ( / T/R/T / L H I I I I D D / H R A D R H R S S S S A A 5 4 3/
D D D D D D D D D D D D D D D D D C F ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( C N R 0 F F F F F F F K K K K K K K K N C J 0 1 2 A G A P P P P P P P P P P P P P P P P G V P P P P 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 (OC0B) PG5 1 75 PA3 (AD3) (RXD0/PCINT8) PE0 2 74
= (pgm_read_byte(&progmem_image[1])/4); // pages = 4 Dots y = yPos/4; for (k = 0; k < height/2; k++) { for ( c = 0; c < width; c++) { LO = (pgm_read_byte(&progmem_image[width * k+c+2 ]) & 0x0F); // 4 LSB -> LO HI = (pgm_read_byte(&progmem_image[width * k
k++) { for ( c = 0; c < width; c++) { dta = pgm_read_byte(&progmem_image[width * k+c+2 ]); lcd_moveto_xy(k+y,c+xPos); lcd_data(dta); } } } Gruss Klong
C C C C X = don’t care bit K K K K K 2004 Microchip Technology Inc. DS21203M-page 9 24AA256/24LC256/24FC256 7.0 ACKNOWLEDGE POLLING FIGURE 7-1: ACKNOWLEDGE POLLING FLOW Since the device will not acknowledge during a write cycle
is no problem to add a transistor that can. For example, consider base current flows through the 1 kΩ resistor using a 40669 triac to turn ON a 115 V or 230 V ac load. This triac to the 2N5812 transistor, thereby saturating it would require about 80 mA of gate current to trigger it to the ON and shorting
within range of 3 to 33 to improve the display quality by controlling the phase of the internal LCD AC signal (M) by using the 2-byte instruction. The DC-bias problem could be occurred if K is even number. So, we recommend customers to set K to be odd number. K : D/N D : The number of display ratio (D
equivalent to setting the Coupling option in the Vertical menu. Group Vertical Syntax CH<x>:COUPling { AC | DC | GND } CH<x>:COUPling? Arguments AC sets the specified oscilloscope channel to AC coupling. 2-64 TDS200, TDS1000/2000, TDS1000B/2000B, TPS2000 Programmer Command Descriptions DC sets the specified
resistance (pin 1) 0.5 5 M G Voltage gain (open loop) 90 dB v G v Voltage gain (closed loop) f = 1 kHz 29.5 30 30.5 dB eN Input noise voltage B = 22 Hz to 22 KHz 3 10 V N Input noise current 80 200 pA SVR Supply voltage rejection R L 4 Gv= 30 dB 40 50 dB R g 22 k Vripple 0.5 eff fripple100 Hz I Drain
6 7 8 9 T N 1 0 / 1 0 P 9 0 1 92R K001 AGES 1 1 1 1 0 1 2 3 A L H T T A C C 1 1 K R 4 O R 8 2 82R K00191 GES E E E E I I I I E O I X A N G S 9 3 72R K00181 GES S S S S K K K K S H L E B I A K K 4 62R K00171 GES 5 5 4 4 4 4 4 4 4 4 4 4
Ich bräuchte die Wiederstandswerte zwischen 7 und 8 sowie 7 und 9 bei folgenden Abweichungen. +2°K im Raum zu warm +1°K im Raum zu warm +0,5°K im Raum zu warm 0°K Raumtemperatur Ok -0,5°K im Raum zu kalt -1°K im Raum zu kalt -2°K im Raum zu kalt -5°K im Raum zu kalt (Wechsel bei mir von Nacht
O O O O O O O O S C C F O U F A A AS 3 3 1 3 5 7 9 1 1 3 5 1 2 1 N 3 2 1 M M U U U U U U 2 2 2 M T K K E / O S S S No.187 D D O O O O O O O O O D S C C F O U F A A A DMY34 ASW1 DMY35 ASW1 DMY36 ASW2 DMY37 ASW2 DMY38 No.485 ASW3 DMY39 ASW3 TEG16 JBT6K71-AS(A) Bump side up TEG15 TEG17 MARK-2 TEG14 TEG18
Generator buffer. For example, the E416, EL16, LVEL16, EP16, Figure 21. Differential and Single−Ended AC LVEP16, EL17, LVEL17, etc. type devices have a V BB pin Configurations Using V BB Reference available for constructing a BB Generator buffer. In Figure 21A, the IN line has a 1 k resistor to VBB , 1
is no problem to add a transistor that can. For example, consider base current flows through the 1 kΩ resistor using a 40669 triac to turn ON a 115 V or 230 V ac load. This triac to the 2N5812 transistor, thereby saturating it would require about 80 mA of gate current to trigger it to the ON and shorting
Cursor move ADD: DDRAM address R/L = 1: Shift to the right (corresponds to cursor When f cpor OSCis 250 kHz, R/L = 0: Shift to the left address) 37 µs ×70= 40 µs DL = 1: 8 bits, DL = 0: 4 bits AC: Address counter used for 250 N = 1: 2 lines, N = 0: 1 line both DD and CGRAM F = 1: 5 × 10 dots, F = 0: 5×8
Disable COM Split Odd Even (POR) A[5]=1, Enable COM Split Odd Even A[7:6]=00; 256 color format = 01; 65k color format(POR) Data formats are defined as CCCBBBAA for 256 color CCCCCBBB for 65k color BBBAAAAA 12 SOLOMON Rev 0.23 SSD1332 08/2003 Hex Command Description Set display RAM display start line register
converted by the output interface to a single-sided unipolar In normal operation, however, using an ac-coupled input signal, current nominally scaled 2 μA/dB (40 μA/decade) at Pin OUT. theOFSpinshouldbeleftopen.Anyresidualinputoffset voltage Anon-chip12.5kΩresistor,R1,convertsthiscurrenttoa voltage is
] with mask k ROM[n] |= k; else ROM[n] &= ~k; write_bit(g); // ROM search write m++; // increment bit counter m k = k<<1; // and shift the bit mask k if(k==0) // if the mask is 0 then go to new ROM { // byte n and
inactive) ySupport 3.5-inch or 5.25-inch floppy disk drives yCompatible with industry standard 82077 y360K / 720K / 1.2M / 1.44M / 2.88M formats y250K, 300K, 500K, 1M, 2M bps data transfer rate ySupport 3-mode FDD and its Windows driver UART yTwo high-speed, 16550-compatible UARTs with 16-byte send / receive
is no problem to add a transistor that can. For example, consider base current flows through the 1 kΩ resistor using a 40669 triac to turn ON a 115 V or 230 V ac load. This triac to the 2N5812 transistor, thereby saturating it would require about 80 mA of gate current to trigger it to the ON and shorting
Cursor move ADD: DDRAM address R/L = 1: Shift to the right (corresponds to cursor When f cpor OSCis 250 kHz, R/L = 0: Shift to the left address) 37 µs ×70= 40 µs DL = 1: 8 bits, DL = 0: 4 bits AC: Address counter used for 250 N = 1: 2 lines, N = 0: 1 line both DD and CGRAM F = 1: 5 × 10 dots, F = 0: 5×8
hi-Z” state). 11)Drift data is based on a 1000 hour stress test at 125°C wDDh V5.5V. 19 of 21 DS18B20 AC ELECTRICAL CHARACTERISTICS: NV MEMORY (-55°C to +100°C; V DD= 3.0V to 5.5V) PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS NV Write Cycle Time twr 2 10 ms EEPROM Writes N EEWR -55°C to +55°C 50k writes EEPROM Data Retention tEEDR -55°C to +55°C 10 years AC ELECTRICAL CHARACTERISTICS (-55°C to +125°C; V DD = 3.0V to 5.5V) PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS NOTES Temperature Conversion tCONV 9-bit resolution 93.75 ms 1 Time 10-bit resolution 187.5
is no problem to add a transistor that can. For example, consider base current flows through the 1 kΩ resistor using a 40669 triac to turn ON a 115 V or 230 V ac load. This triac to the 2N5812 transistor, thereby saturating it would require about 80 mA of gate current to trigger it to the ON and shorting
Bestätigung 09237 0x2415 e2 90 95 SYMBOL FOR acknowledgement NEGATIVE ACKNOWLEDGE 022 0x16 ctrl V 09644 0x25ac e2 96 ac ▬ BLACK SYN synchronous idle Synchronisationssignal09238 0x2416 e2 90 96 SYMBOL FOR RECTANGLE SYNCHRONOUS IDLE 023 0x17 ctrl W 08616 0x21a8 e2 86 a8 ↨ UP DOWN ETB end of Übertragungsblock-Ende
Beschrebingen: MODEL ----- * OPA561 SPICE Macro-model * * Rev. A 12 August 2003, by W.K. Sands * * Rev. B 13 August 2003 By Neil Albaugh: ADDED HEADER TEXT & EDITED TEXT * * This macromodel has been optimized to model the AC, DC, and transient response performance within *
Code Execution Time Instruction Description RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 OSC= OSC= OSC= 380kHz 540kHz 700kHz Clear 0 0 0 0 0 0 0 0 0 1 Write "20H" to DDRAM. and set 1.08 0.76 0.59 Display DDRAM address to "00H" from AC ms ms ms Set DDRAM address to "00H" from Return AC and return cursor to its
Code Execution Time Instruction Description RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 OSC= OSC= OSC= 380kHz 540kHz 700kHz Clear 0 0 0 0 0 0 0 0 0 1 Write "20H" to DDRAM. and set 1.08 0.76 0.59 Display DDRAM address to "00H" from AC ms ms ms Set DDRAM address to "00H" from Return AC and return cursor to its
sind Schottky Dioden. Ist eventuell beim Eagle Symbol nicht so gut erkennebar ?! Wichtig ist der 2k Widerstand, bei Peters Bootloader wurde dort ein 4k7 angegeben. Ich habe diese bei meinen Tests mit ATmega128, ATmega168 und ATtiny461 dann auf 2k reduziert. Als RS232 habe ich die RS232 meines Laptops
den Bootloader herstellen. Nutze einen echten COM Port. Als Adapter habe ich schon ausprobiert: 2,7k und 2xBAT85 1k und 2xBAT85 10k und 2xBAT85 2,7k und 2xSB120 1k und 2xSB120 10k und 2xSB120 auch mal noch zusätzlich eine 3,3V Zener gegen GND. Hat aber auch nichts gebracht. Hat jemand eine
