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DS1307.pdf
Bus Free Time Between a STOP and tBUF 4.7 ms START Condition Hold Time (Repeated) START Condition HD:STA 4.0 ms 3 LOW Period of SCL Clock LOW 4.7 ms HIGH Period of SCL Clock tHIGH 4.0 ms Set-up Time for a Repeated START SU:STA 4.7 ms Condition Data Hold Time tHD:DAT 0 ms 4,5 Data Set-up Time SU:DAT 250
in „Real-Time Clock (ds1307)“ · Mikrocontroller und Digitale Elektronik ·
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Artikel
Siemens MP3 Player
bearbeiten klicken (siehe oben) und hier dazu schreiben. Hardware. Multilayer-Leiterplatte MP3-Decoder: STA015T (TQFP44-Gehäuse) DAC: CS4340 Controller: ST92163 (8/16 bit core, full speed USB transceiver), leider OTP-Variante, getaktet mit 8MHz SPI Clock zum MP3-Decoder: 2MHz Offenbar 5A P-Kanal FET im SO8
Artikel ·
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Thread
Z180-Stamp Modul
werden. => sd status 0 Socket status: 01 Mit: [c] /* Disk Status Bits (DSTATUS) */ #define STA_NOINIT 0x01 /* Drive not initialized */ #define STA_NODISK 0x02 /* No medium in the drive */ #define STA_PROTECT 0x04 /* Write protected */ #define STA_FAST 0x08 /* Fast SPI clock
Quelle? Meine habe ich von hier: https://www.aliexpress.com/item/Free-shipping-10pcs-lot-Tmpz84c015bf-10-TMPZ84C015BF-TMPZ84C015-QFP-100-IC/32472094972.html
Mikrocontroller und Digitale Elektronik ·Joe G. · ·1125 Antworten
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69034fe-6.pdf
Operating Frequency l 10 100 kHz t Bus Free Time Between STOP and START Condition l 4.7 µs BUF tHD,STA Hold Time After (Repeated) START Condition l 4.0 µs l tSU,STA Repeated START Condition Setup Time 4.7 µs tSU,STO STOP Condition Setup Time l 4.0 µs LTC6904 (Notes 5, 6) t Data Hold Time l 300 ns HD,
in „I2C Deadlock beim Senden - LTC6904“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ABOV-Semicon-MC80F0604_C142970.pdf
Y-register data. Also index can be used with Index register X,Y. ADC, AND, CMP, EOR, LDA, OR, SBC, STA JMP, CALL Example; G=0, Y=10 Example; G=0 H 1725 ADC [25H]+Y 3F35 JMP [35H] 35H 0A 25H 05 36H E3 26H E0 ~ ~ 2 ~ ~ 2 1 0E30AH NEXT 1 0E005H + Y(10) address 0E30AH 0E015H data = 0E015H ~ ~ ~ ~ 0FA00H
in „Steuerung Infrorotkabine / Openhab“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PCF8583.pdf
spike width on bus − − 100 ns BUF bus free time 4.7 − − s t START condition set-up time 4.7 − − s SU;STA HD;STA START condition hold time 4.0 − − s LOW SCL LOW time 4.7 − − s HIGH SCL HIGH time 4.0 − − s r SCL and SDA rise time − − 1.0 s t SCL and SDA fall time − − 0.3 s f SU;DAT data set-up time 250 −
in „RTC PCF8583 einen Interrupt ausloesen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PCF8583_5_rtc_real_time_clock.pdf
spike width on bus − − 100 ns BUF bus free time 4.7 − − s t START condition set-up time 4.7 − − s SU;STA HD;STA START condition hold time 4.0 − − s LOW SCL LOW time 4.7 − − s HIGH SCL HIGH time 4.0 − − s r SCL and SDA rise time − − 1.0 s t SCL and SDA fall time − − 0.3 s f SU;DAT data set-up time 250 −
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PDF
PCF8583P.pdf
spike width on bus − − 100 ns BUF bus free time 4.7 − − s t START condition set-up time 4.7 − − s SU;STA HD;STA START condition hold time 4.0 − − s LOW SCL LOW time 4.7 − − s HIGH SCL HIGH time 4.0 − − s r SCL and SDA rise time − − 1.0 s t SCL and SDA fall time − − 0.3 s f SU;DAT data set-up time 250 −
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PDF
PCF8583_5.pdf
spike width on bus − − 100 ns BUF bus free time 4.7 − − s t START condition set-up time 4.7 − − s SU;STA HD;STA START condition hold time 4.0 − − s LOW SCL LOW time 4.7 − − s HIGH SCL HIGH time 4.0 − − s r SCL and SDA rise time − − 1.0 s t SCL and SDA fall time − − 0.3 s f SU;DAT data set-up time 250 −
in „PCF8583: Welche Genauigkeit kann ìch erwarten?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
M27C1001.PDF
except for VPP and 12V on A9 for Electronic Signature. E has been low and the addresses have been sta- Read Mode ble for at leastAVQV GLQV . Standby Mode The M27C1001 has two control functions, both of which must be logically active in order to obtain The M27C1001 has a standby mode which reduc- data
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PDF
I2C_EEPROM_-_ST24C04.pdf
Out Hold Time 200 ns t 3 tAA Clock Low to Next Data Valid (Access Time) 200 900 ns CLQV 1 CHDX tSU:STA Start Condition Set Up Time 600 ns DLCL tHD:STA Start Condition Hold Time 600 ns tCHDH tSU:STO Stop Condition Set Up Time 600 ns Time between Stop Condition and Next Start tDHDL tBUF Condition 1300
in „I²C - EEPROM's (24C04 ...)“ · Mikrocontroller und Digitale Elektronik ·
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PDF
BK4802N_Datasheet_V1.1_EN.pdf
kHz SCLK Low Time LOW 1.3 — — μs SCLK High Time t 0.6 μs HIGH SCLK Input to SDIO ↓ Setup(START) SU:STA 0.6 — — μs SCLK Input to SDIO ↓ Hold(START) HD:STA 0.6 — — μs SDIO Input to SCLK ↑ Setup SU:DAT 100 — — ns SDIO Input to SCLK ↓ Hold HD:DAT — — 900 ns SCLK Input to SDIO ↑ Setup(STOP) t 0.6 — — μs SU
in „Tranceiver Chip RDA1846 Erfahrungen Selbstbau“ · HF, Funk und Felder ·
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PDF
24C16.pdf
0.1 4.5 0.1 0.9 s tBUF Time the bus must be free before a new 4.7 1.2 s transmission can start1) tHD.STA Start Hold Time 4.0 0.6 s tSU.STA Start Set-up Time 4.7 0.6 s tHD.DAT Data In Hold Time 0 0 s tSU.DAT Data In Set-up Time 200 100 ns (1) tR Inputs Rise Time 1.0 0.3 s (1) tF Inputs Fall Time 300 300
in „Erstellen eines 24C16 Eeproms in Multisim“ · Mikrocontroller und Digitale Elektronik ·
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OV5620_CLCC_DS__1.3_.pdf
Timing Specifications Figure 14 Serial Bus Timing Diagram t t t F HIGH R SCL t tSU:STO t LOW t HD:STA SU:DAT SDA(IN) tSU:STA AA tHD:DAT tBUF SDA(OUT) t DH 5620CLCC_DS_014 Table 7 Serial Bus Timing Specifications Symbol Parameter Min Typ Max Unit SCL Clock frequency 400 KHz LOW Clock low period 1.3 µs
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Motorola_MC44353_MC44354_MC44355_1998.pdf
800 kHz C Bus Free Time Between Stop and Start Tbuf 200 – – ns C Setup Time for Start Conditions Tsu;sta 500 – – ns C Hold Time for Start Condition Thd;sta 500 – – ns C Data Setup Time Tsu;dat 0 – – ns C Data Hold Time T 0 – – ns C hd;dat Setup Time for Stop Condition T 500 – – ns C su;sto Hold time for
in „Pollin ist pleite :-(“ · Offtopic ·
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AD7190.pdf
( 20 L I –2 10 –4 0 0 0 0 0 0 0 6 6 7 7 7 8 8 8 8 8 8 8 –6 3 3 3 3 3 3 1 1 8 8 8 8 8 8 0 –0.020 –0.015 –0.010 –0.005 0 0.005 0.010 0.015 0.020 0 6 V (V) 6 CODE 0 IN 0 Figure11.NoiseDistributionHistogram(V REF=5V, Figure13.INL(Gain=128) OutputDataRate=4800Hz,Gain=1,ChopDisabled,Sinc 4Filter) Rev. B |
in „AD7190 Clock“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
PCF8574_4.pdf
frequency − − 100 kHz SCL SW tolerable spike width on bus − − 100 ns BUF bus free time 4.7 − − s SU;STA START condition set-up time 4.7 − − s HD;STA START condition hold time 4.0 − − s LOW SCL LOW time 4.7 − − s HIGH SCL HIGH time 4.0 − − s t SCL and SDA rise time − − 1.0 s r f SCL and SDA fall time −
in „PCF8574 Routine in C“ · Mikrocontroller und Digitale Elektronik ·
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PCF8574_4.pdf
frequency − − 100 kHz SCL SW tolerable spike width on bus − − 100 ns BUF bus free time 4.7 − − s SU;STA START condition set-up time 4.7 − − s HD;STA START condition hold time 4.0 − − s LOW SCL LOW time 4.7 − − s HIGH SCL HIGH time 4.0 − − s t SCL and SDA rise time − − 1.0 s r f SCL and SDA fall time −
in „I²C tolle Alternative“ · Mikrocontroller und Digitale Elektronik ·
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PCF8591_6.pdf
clock frequency − − 100 kHz SP tolerable spike width on bus − − 100 ns BUF bus free time 4.7 − − s SU;STA START condition set-up time 4.7 − − s HD;STA START condition hold time 4.0 − − s LOW SCL LOW time 4.7 − − s t SCL HIGH time 4.0 − − s HIGH r SCL and SDA rise time − − 1.0 s f SCL and SDA fall time −
in „Welchen DAC empfehlt Ihr ? sollte bei Reichelt kaufbar sein“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PCF8591.pdf
frequency − − 100 kHz SCL SP tolerable spike width on bus − − 100 ns BUF bus free time 4.7 − − s SU;STA START condition set-up time 4.7 − − s HD;STA START condition hold time 4.0 − − s LOW SCL LOW time 4.7 − − s HIGH SCL HIGH time 4.0 − − s t SCL and SDA rise time − − 1.0 s r f SCL and SDA fall time −
in „Datentransfer an PCF8591“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PCF8574_4.pdf
frequency − − 100 kHz SCL SW tolerable spike width on bus − − 100 ns BUF bus free time 4.7 − − s SU;STA START condition set-up time 4.7 − − s HD;STA START condition hold time 4.0 − − s LOW SCL LOW time 4.7 − − s HIGH SCL HIGH time 4.0 − − s t SCL and SDA rise time − − 1.0 s r f SCL and SDA fall time −
in „I2C mit Display parallel?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PCF8591.pdf
frequency − − 100 kHz SCL SP tolerable spike width on bus − − 100 ns BUF bus free time 4.7 − − s SU;STA START condition set-up time 4.7 − − s HD;STA START condition hold time 4.0 − − s LOW SCL LOW time 4.7 − − s HIGH SCL HIGH time 4.0 − − s t SCL and SDA rise time − − 1.0 s r f SCL and SDA fall time −
in „I2C Analog Mux/Demux im DIP gesucht“ · Mikrocontroller und Digitale Elektronik ·
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Data_PCF_8574.pdf
spike width on bus − − 100 ns BUF bus free time 4.7 − − s t START condition set-up time 4.7 − − s SU;STA HD;STA START condition hold time 4.0 − − s LOW SCL LOW time 4.7 − − s HIGH SCL HIGH time 4.0 − − s r SCL and SDA rise time − − 1.0 s f SCL and SDA fall time − − 0.3 s SU;DAT data set-up time 250 − −
in „Austausch IC mit DIP gegen SMD“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PCF8574.pdf
spike width on bus − − 100 ns BUF bus free time 4.7 − − s t START condition set-up time 4.7 − − s SU;STA HD;STA START condition hold time 4.0 − − s LOW SCL LOW time 4.7 − − s HIGH SCL HIGH time 4.0 − − s r SCL and SDA rise time − − 1.0 s f SCL and SDA fall time − − 0.3 s SU;DAT data set-up time 250 − −
in „[V] #VERKAUFT# Platine mit 8 Stück DLG7137, 5*7 Punktmatrix“ · Markt ·
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NM93C46.PDF
Valid Status ▯ s E ) P R O M NORMAL READ CYCLE (READ) CS CS SK 1 1 0 A5 A4 A1A0 DI ▯▯▯▯▯▯▯▯▯▯▯▯▯▯ StaOpcode Address BitBits(2) Bits(6) ▯▯▯▯▯▯▯▯▯▯▯▯▯▯ High - Z DO 0 D15 D1 D0 ▯▯▯ Dummy Bit ▯▯▯ 93C46: Address bits pattern -> User defined WRITE ENABLE CYCLE (WEN) CS CS SK 1 0 0 A5 A4 A1 A0 DI BitBits(2
in „EEPROM durch anders tauschen, was beachten?“ · Mikrocontroller und Digitale Elektronik ·
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21709c_EEPROM.pdf
— — 1000 1.8V ≤ VC < 2.5V (24AA02) (Note 1) 5 TF SDA and SCL fall time — — 300 ns (Note 1) — 6 THD:STA Start condition hold time600 — — ns 2.5V ≤ CC ≤ 5.5V 4000 — — 1.8V ≤ CC < 2.5V (24AA02) 7 TSU:STA Start condition setup 600 — — ns 2.5V ≤ CC ≤ 5.5V time 4700 — — 1.8V ≤ VC < 2.5V (24AA02) 8 THD:DAT
in „EEPROM mit Infineon XC2200 ueber IIC benutzten“ · Mikrocontroller und Digitale Elektronik ·
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PDF
21709c.pdf
— — 1000 1.8V ≤ VC < 2.5V (24AA02) (Note 1) 5 TF SDA and SCL fall time — — 300 ns (Note 1) — 6 THD:STA Start condition hold time600 — — ns 2.5V ≤ CC ≤ 5.5V 4000 — — 1.8V ≤ CC < 2.5V (24AA02) 7 TSU:STA Start condition setup 600 — — ns 2.5V ≤ CC ≤ 5.5V time 4700 — — 1.8V ≤ VC < 2.5V (24AA02) 8 THD:DAT
in „24LC02B mit (scheinbar) seltsamer Adressierung“ · Mikrocontroller und Digitale Elektronik ·
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PDF
BM83_Embedded_Mode_Reference_Circuit_PCB.pdf
must be placed close to the 0402 NCP15WF104F03 SOD-323 P7 PI 15pF SOD-323 P0 P4 15pF SOD-323 PD PI015pF battery in the user application for 01H1%P (Thermistor) 50V 50V 50V accurate measurements and to enable 0402 0402 0402 the thermal shutdown feature. VOL- VDD_IO Potentiometer (OPTIONAL) IP10SW8 PIW40
in „BM83SM1-00TA Blootoh Audio“ · Mikrocontroller und Digitale Elektronik ·
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PDF
pcf8573.pdf
frequency − − 100 kHz t tolerable spike width on bus − − 100 ns SP BUF bus free time 4.7 − − s SU;STA START condition set-up time 4.7 − − s HD;STA START condition hold time 4.0 − − s LOW SCL LOW time 4.7 − − s t SCL HIGH time 4.0 − − s HIGH r SCL and SDA rise time − − 1.0 s f SCL and SDA fall time −
in „DS3231 vs PCF8573, hilfe gesucht !“ · Mikrocontroller und Digitale Elektronik ·
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MMC5633NJL.pdf
Leakage Current Ii 0.1VIOV <in9V IO -10 10 µA SCL Clock Frequency fSCL 0 400 kHz START Hold Time tHD;STA 0.6 µS START Setup Time tSU;STA 0.6 µS LOW period of SCL tLOW 1.3 µS HIGH period of SCL tHIGH 0.6 µS Data Hold Time tHD;DAT 0 0.9 µS Data Setup Time tSU;DAT 0.1 µS Rise Time tr From V ILV IH 0.3 µS
in „Sensor Array ansprechen mit I2C - Unterschiede zu Mega2560 und Seeed RP2040“ · Mikrocontroller und Digitale Elektronik ·
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TDA8425.PDF
4.7 − − s SCL rise time t − − 1 s r SCL fall time f − − 0.3 s Set-up time for start condition SU; STA 4.7 − − s Hold time for start condition HD; STA 4 − − s Set-up time for stop condition SU; STO 4.7 − − s Time bus must be free before a new transmission can start BUF 4.7 − − s Set-up time DATA SU;
in „Eingangsspannung beim TDA8425“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
TDA8425.pdf
4.7 − − s SCL rise time t − − 1 s r SCL fall time f − − 0.3 s Set-up time for start condition SU; STA 4.7 − − s Hold time for start condition HD; STA 4 − − s Set-up time for stop condition SU; STO 4.7 − − s Time bus must be free before a new transmission can start BUF 4.7 − − s Set-up time DATA SU;
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PDF
MAX1647.PDF
Serial-Clock High Period HIGH 4 µs SCL Serial-Clock Low Period LOW 4.7 µs Start-Condition Setup Time SU:STA 4.7 µs Start-Condition Hold Time HD:STA 4 µs SDA Valid to SCL Rising-Edge t 250 ns Setup Time, Slave Clocking in Data SU:DAT SCL Falling Edge to SDA Transition HD:DAT 0 ns SCL Falling Edge to SDA Valid
in „Win98 Diagnose Notebook Akku immer 50%“ · PC Hard- und Software ·
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PDF
MAX1647_1_.PDF
Serial-Clock High Period HIGH 4 µs SCL Serial-Clock Low Period LOW 4.7 µs Start-Condition Setup Time SU:STA 4.7 µs Start-Condition Hold Time HD:STA 4 µs SDA Valid to SCL Rising-Edge t 250 ns Setup Time, Slave Clocking in Data SU:DAT SCL Falling Edge to SDA Transition HD:DAT 0 ns SCL Falling Edge to SDA Valid
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datasheet__4_.pdf
spike width on bus − − 100 ns BUF bus free time 4.7 − − s t START condition set-up time 4.7 − − s SU;STA HD;STA START condition hold time 4.0 − − s LOW SCL LOW time 4.7 − − s HIGH SCL HIGH time 4.0 − − s r SCL and SDA rise time − − 1.0 s t SCL and SDA fall time − − 0.3 s f SU;DAT data set-up time 250 −
in „Wie verbindet man pcf8593 und arduino (eigentlich irgend uC)“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ADT7420.pdf
t F 0.3 μs HoldTime (Start Condition), t 0.6 μs After this period, the first clock is generated HD:STA SetupTime (Start Condition), t SU:STA 0.6 μs Relevant for repeated start condition Data SetupTime, t SU:DAT 0.02 μs SetupTime (Stop Condition), t SU:STO 0.6 μs Data HoldTime, t HD:DATMaster) 0.03 μs
in „STM32F4 mit I2C-Sensor“ · Mikrocontroller und Digitale Elektronik ·
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PDF
24LC256_32k_I2C-EEPROM.pdf
TF SDA and SCL fall time — 300 ns All except, 24FC256 (Note 1) — 100 1.8V ≤ VC ≤ 5.5V 24FC256 6 THD:STA Start condition hold time 4000 — ns 1.8V ≤ CC < 2.5V 600 — 2.5V ≤ VC ≤ 5.5V 600 — 1.8V ≤ VC < 2.5V 24FC256 250 — 2.5V ≤ CC ≤ 5.5V 24FC256 7 TSU:STA Start condition setup time 4700 — ns 1.8V ≤ CC < 2.5V
in „immer noch EEprom“ · Mikrocontroller und Digitale Elektronik ·
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PDF
EEPROM.pdf
TF SDA and SCL fall time — 300 ns All except, 24FC256 (Note 1) — 100 1.8V ≤ VC ≤ 5.5V 24FC256 6 THD:STA Start condition hold time 4000 — ns 1.8V ≤ CC < 2.5V 600 — 2.5V ≤ VC ≤ 5.5V 600 — 1.8V ≤ VC < 2.5V 24FC256 250 — 2.5V ≤ CC ≤ 5.5V 24FC256 7 TSU:STA Start condition setup time 4700 — ns 1.8V ≤ CC < 2.5V
in „EEPROM auslesen (24xx256) mit Pic16f819, an PC über RS232“ · Mikrocontroller und Digitale Elektronik ·
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Thread
MMC/SD ansteuern mit AVR
solt. Einschaltkontakt gibts zwar nicht und entlöten muss man ja auch, aber dafür kann man noch einen STA015T MP3 Decoder, nen DAC dazu und eine uC mit USB von ST ausschlachten. Für letzeren habe ich allerdings noch keine Software gefunden. Ist wohl ein spezieller, wenig verbreiteter, uC. Falls es noch
Projekte & Code ·uli · ·328 Antworten
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PDF
INA102.pdf
= +25°C 0.05 0.02 * % of FS G = 1000 T = +25°C 0.1 0.05 * % of FS A G = 1 TA= T MINto TMAX 0.045 0.015 * % of FS G = 10 TA= T MINto TMAX 0.045 0.015 * % of FS G = 100 T = T to T 0.075 0.03 * % of FS A MIN MAX G = 1000 TA= T MINto TMAX 0.15 0.1 * % of FS RATED OUTPUT Voltage RL= 10k ± (|V CC– 2.5) * *
in „Pulsmessung und Anzeige der Pulswelle auf einem LCD Display“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Praktikumsbeleg_A3_1_.pdf
mit: TA= L A U A(s)−U q(s) RA 1+ sT A RA uq(t) T A 1.5msek Blockbild: U As) 1 1 IA(s) G = ∗ RA 1+ sTA - U qs) Ankerrückwirkung: G 5 uq(t) = cΦ∗ω(t) cF: magnetischer Fluß U q(s) G 5(s) = Ω(s) = cΦ Blockbild: Ω(s) U qs) G 5= cΦ cF= 1.3Vs Reibung G 4 M Re (t) = kR∗ω(t) kR: Reibungswert M Re (s) = kR∗Ω(
in „Frage zu Übertragungsfunktion, Sprungantwort“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MAX6956_i2c_28_LED.pdf
Free Time Between a STOP tBUF 1.3 µs and a START Condition Hold Time (Repeated) START Condition tHD, STA 0.6 µs Repeated START Condition tSU, STA 0.6 µs Setup Time STOP Condition Setup Time tSU, STO 0.6 µs Data Hold Time tHD, DAT (Note 3) 15 900 ns Data Setup Time tSU, DAT 100 ns SCL Clock Low Period LOW
in „Suche IC für LED Bar-Anzeige“ · Mikrocontroller und Digitale Elektronik ·
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PDF
lg_lh-cx245_cx246_cx247_cx640__1_.pdf
26.30 22 0.07 0.06 22 0.00 0.00 48 17 15.61 15.61 35 31.58 31.58 23 0.390.61 23 2.00 2.00 IC710 (AMP,STA508) 18 NC NC 36 31.58 31.58 24 2.35 2.04 24 0.00 0.00 1 0.00 0.00 190.00 0.00 IC770 (AMP,STA508) 25 2.35 2.05 25 0.00 0.00 2 15.60 15.60 20 0.02 0.02 1 0.00 0.00 26 1.44 1.46 26 2.47 2.47 3 15.60 15.60
in „Netzteil von LG LH-C360 defekt“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
AT24C01A_02_04_08_16__2001_.pdf
0.1 4.5 0.1 0.9 µs tBUF Time the bus must be free b(1)re 4.7 1.2 µs a new transmission can start tHD.STA Start Hold Time 4.0 0.6 µs tSU.STA Start Setup Time 4.7 0.6 µs t Data In Hold Time 0 0 µs HD.DAT t Data In Setup Time 200 100 ns SU.DAT tR Inputs Rise Time(1) 1.0 0.3 µs tF Inputs Fall Time1) 300 300
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PDF
ST62T65_Datasheet.pdf
conversion has to be separately initiated by writing low pass filter may be used at the analog input to the STA bit. pins to reduce input voltage variation during con- The STA bit is continuously scanned so that, if the version. user sets it to “1” while a previous conversion is in progress, a new conversion
in „External RC Network / ST62T65“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ST6265C.pdf
conversion has to be separately initiated by writing low pass filter may be used at the analog input to the STA bit. pins to reduce input voltage variation during con- The STA bit is continuously scanned so that, if the version. user sets it to “1” while a previous conversion is in progress, a new conversion
in „Code Space Overlap Fehler“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PCF8591_ADC.pdf
suppressed by the input filter t bus free time between a STOP and START 4.7 - - s BUF condition tSU;STA set-up time for a repeated START condition 4.7 - - s t hold time (repeated) START condition 4.0 - - s HD;STA tLOW LOW period of the SCL clock 4.7 - - s tHIGH HIGH period of the SCL clock 4.0 - -
in „PCF8591 - I2C Protokoll“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PCF8593.pdf
suppressed by the input filter BUF bus free time between a 4.7 - - μs STOP and START condition SU;STA set-up time for a repeated 4.7 - - μs START condition HD;STA hold time (repeated) START 4.0 - - μs condition LOW LOW period of the SCL clock 4.7 - - μs HIGH HIGH period of the SCL clock 4.0 - - μs r
in „PCF8593 über I2C Bus steuern“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PCA8574-rev02.pdf
SCL clock frequency 0 - 400 kHz BUF bus free time between a STOP and START 1.3 - - s condition HD;STA hold time (repeated) START condition 0.6 - - s SU;STA set-up time for a repeated START condition 0.6 - - s SU;STO set-up time for STOP condition 0.6 - - s t data hold time 0 - - ns HD;DAT VD;ACK data
in „NXP PCA8574 hat Phänomen mit 2 Adressen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
LTC2945.pdf
Period 50 600 ns HIGH tBUF(MIN) MinimumBus Free Time Between Stop/Start 0.12 1.3 μs Condition tHD,STA(MIN) MinimumHold Time After (Repeated) Start 140 600 ns Condition tSU,STA(MIN) MinimumRepeated Start Condition Set-Up 30 600 ns Time tSU,STO(MIN) MinimumStop Condition Set-Up Time 30 600 ns tHD,DATI
in „U/I/P Metrer für Netzteile“ · Mikrocontroller und Digitale Elektronik ·