Im RM0008 von ST habe ich folgendes gefunden:
Example of configuration
To output a simple value to the TPIU:
● Configure the TPIU and assign TRACE IOs by configuring the DBGMCU_CR
(refer to
Section 30.17.2: TRACE pin assignment and Section 30.16.3: Debug MCU
configuration register)
● Write 0xC5ACCE55 to the ITM Lock Access Register to unlock the write
access to the
ITM registers
● Write 0x00010005 to the ITM Trace Control Register to enable the ITM
with Sync
enabled and an ATB ID different from 0x00
● Write 0x1 to the ITM Trace Enable Register to enable the Stimulus Port
0
● Write 0x1 to the ITM Trace Privilege Register to unmask stimulus ports
7:0
● Write the value to output in the Stimulus Port Register 0: this can be
done by software
(using a printf function)
TPUI TRACE pin assignment
By default, these pins are NOT assigned. They can be assigned by setting
the
TRACE_IOEN and TRACE_MODE bits in the MCU Debug component configuration
register. This configuration has to be done by the debugger host.
Der letzte Satz gibt mir ein bisschen zu denken, kann ich etwa nur per
Debugger den SWO-Pin einstellen? Ich habe die entsprechenden Register
wie vorgesehen beschrieben, aber es funktioniert nur wenn ich Debugge.
1 | /* Aktiviere SWD */
|
2 | AFIO->MAPR |= AFIO_MAPR_SWJ_CFG_JTAGDISABLE;
|
3 |
|
4 | /* Aktiviere TRACE */
|
5 | CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
|
6 | /* Select Pin Protocol -> SWO NRZ */
|
7 | *((char*)0xE00400F0) = 0x02;
|
8 | /* Aktiviere den asynchronen Trace mode */
|
9 | // DBGMCU->CR &= !DBGMCU_CR_TRACE_MODE;
|
10 | /* Aktiviere den Trace Pin */
|
11 | DBGMCU->CR = DBGMCU_CR_TRACE_IOEN;
|
12 | /* Unlock ITM registers */
|
13 | ITM->LAR = 0xC5ACCE55;
|
14 | /* configure and activate ITM trace control */
|
15 | ITM->TCR = 0x00010000 | ITM_TCR_SYNCENA_Msk | ITM_TCR_ITMENA_Msk;
|
16 | /* Aktiviere ITM Port 0 */
|
17 | ITM->TER |= 1;
|
18 | /* unmask stimulus ports 7:0 */
|
19 | ITM->TPR |= 1;
|
Hat jemand eine Idee was da schief läuft?
