AVR ATmega1284p JTAG per Software diasabeln

Bits 7 – JTD: JTAG Interface Disable

When this bit is zero, the JTAG interface is enabled if the JTAGEN Fuse is programmed. If this

bit is one, the JTAG interface is disabled. In order to avoid unintentional disabling or enabling of

the JTAG interface, a timed sequence must be followed when changing this bit: The application

software must write this bit to the desired value twice within four cycles to change its value. Note

that this bit must not be altered when using the On-chip Debug system.

MCUCR

10.12.2 MCUCR – MCU Control Register

Note: 1. Only available in the Atmel ATmega164PA/324PA/644PA/1284P.

• Bit 6 – BODS: BOD Sleep

The BODS bit must be written to logic one in order to turn off BOD during sleep, see Table 10-1 on page 42.

Writing to the BODS bit is controlled by a timed sequence and an enable bit, BODSE in MCUCR. To disable

BOD in relevant sleep modes, both BODS and BODSE must first be set to one. Then, to set the BODS bit,

BODS must be set to one and BODSE must be set to zero within four clock cycles.

The BODS bit is active three clock cycles after it is set. A sleep instruction must be executed while BODS is

active in order to turn off the BOD for the actual sleep mode. The BODS bit is automatically cleared after three

clock cycles.

• Bit 5 – BODSE: BOD Sleep Enable

10.11.7 On-chip Debug System

If the On-chip debug system is enabled by the OCDEN Fuse and the chip enters sleep mode, the main clock

source is enabled, and hence, always consumes power. In the deeper sleep modes, this will contribute

significantly to the total current consumption.

There are three alternative ways to disable the OCD system:

. Disable the OCDEN Fuse

. Disable the JTAGEN Fuse

. Write one to the JTD bit in MCUCR

The application software must write this bit to the desired

value twice within four cycles to change its value.

in r16,MCUCR

ori r16,0x80

cli

out MCUCR,r16

out MCUCR,r16

sei