1 | void uC_init(void)
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2 | {
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3 | unsigned char i = 0;
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4 |
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5 | // Crystal Oscillator division factor: 1
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6 | #pragma optsize-
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7 | CLKPR = 0x80;
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8 | CLKPR = 0;
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9 | #ifdef _OPTIMIZE_SIZE_
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10 | #pragma optsize+
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11 | #endif
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12 |
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13 | // Input/Output Ports initialization
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14 | // Ports A & C - not available in ATmega128RFA1
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15 | // All digital inputs pulled up for now
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16 |
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17 | // Port B initialization
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18 | PORTB = PORT_B_VAL;
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19 | DDRB = PORT_B_DIR;
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20 |
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21 | // Port D initialization
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22 | PORTD = PORT_D_VAL;
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23 | DDRD = PORT_D_DIR;
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24 |
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25 | // Port E initialization
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26 | PORTE = PORT_E_VAL;
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27 | DDRE = PORT_E_DIR;
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28 |
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29 | // Port F initialization
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30 | PORTF = PORT_F_VAL;
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31 | DDRF = PORT_F_DIR;
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32 |
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33 | // Port G initialization
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34 | PORTG = PORT_G_VAL;
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35 | DDRG = PORT_G_DIR;
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36 |
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37 | // Timer/Counter 0 initialization
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38 | // Clock source: System Clock
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39 | // Clock value: 2000,000 kHz
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40 | // Mode: Fast PWM top=OCR0A
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41 | // OC0A output: Non-Inverted PWM
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42 | // OC0B output: Disconnected
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43 | #ifdef RF_COORDINATOR
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44 | TCCR0A = TIMER0_FAST_PWM_TOP_FF;
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45 | TCCR0B = TIMER0_DEFAULT_FREQ;
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46 | TCNT0 = 0;
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47 | OCR0A = 0x80;
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48 | OCR0B = 0;
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49 |
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50 | // set current tone for PWM:
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51 | ptr_tone = &sine_0dB_8bit[0];
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52 | #endif
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53 |
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54 | #ifdef RF_NODE
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55 | TCCR0A = 0;
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56 | TCCR0B = 0;
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57 | TCNT0 = 0;
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58 | OCR0A = 0;
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59 | OCR0B = 0;
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60 | #endif
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61 |
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62 | // Timer1 initialization: 1ms
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63 | // Clock source: System Clock; Clock value: 250,000 kHz
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64 | // Mode: CTC top=OCR1A
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65 | // Compare A Match Interrupt: On
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66 | TCCR1A = 0;
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67 | TCCR1B = 0x0B;
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68 | TCNT1H = 0;
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69 | TCNT1L = 0;
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70 | ICR1H = 0;
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71 | ICR1L = 0;
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72 | OCR1AH = 0;
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73 | OCR1AL = 0xFA;
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74 | OCR1BH = 0;
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75 | OCR1BL = 0;
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76 | OCR1CH = 0;
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77 | OCR1CL = 0;
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78 |
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79 | // Timer/Counter 2 initialization
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80 | // Clock source: Crystal on TOSC1 pin
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81 | // Clock value: PCK2/1024 => 32 ticks per second
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82 | // Mode: Normal top=0xFF => 8sec
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83 | ASSR = 0x20;
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84 | TCCR2A = 0;
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85 | TCCR2B = 0x07;
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86 | TCNT2 = 0;
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87 | OCR2A = 0;
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88 | OCR2B = 0;
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89 | while((ASSR & (1 << TCN2UB)));
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90 |
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91 | // Timer/Counter 3 initialization
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92 | // Clock source: System Clock
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93 | // Clock value: 15,625 kHz
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94 | // Mode: CTC top=OCR3A
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95 | TCCR3A = 0;
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96 | TCCR3B = 0x0D;
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97 | TCNT3H = 0;
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98 | TCNT3L = 0;
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99 | ICR3H = 0;
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100 | ICR3L = 0;
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101 | OCR3AH = 0x3D;
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102 | OCR3AL = 0x09;
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103 | OCR3BH = 0;
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104 | OCR3BL = 0;
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105 | OCR3CH = 0;
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106 | OCR3CL = 0;
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107 |
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108 | // Timer/Counter 4 unused
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109 | TCCR4A = 0;
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110 | TCCR4B = 0;
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111 | TCNT4H = 0;
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112 | TCNT4L = 0;
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113 | ICR4H = 0;
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114 | ICR4L = 0;
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115 | OCR4AH = 0;
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116 | OCR4AL = 0;
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117 | OCR4BH = 0;
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118 | OCR4BL = 0;
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119 | OCR4CH = 0;
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120 | OCR4CL = 0;
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121 |
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122 | // Timer/Counter 5 unused
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123 | TCCR5A = 0;
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124 | TCCR5B = 0;
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125 | TCNT5H = 0;
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126 | TCNT5L = 0;
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127 | ICR5H = 0;
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128 | ICR5L = 0;
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129 | OCR5AH = 0;
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130 | OCR5AL = 0;
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131 | OCR5BH = 0;
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132 | OCR5BL = 0;
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133 | OCR5CH = 0;
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134 | OCR5CL = 0;
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135 |
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136 | // External Interrupt(s) initialization
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137 | // INT0: On
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138 | // INT0 Mode: Low level
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139 | // others off
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140 | EICRA = 0x00;
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141 | EICRB = 0x00;
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142 | EIMSK = 0x01;
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143 | EIFR = 0x01;
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144 | PCMSK0 = 0;
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145 | PCMSK1 = 0;
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146 | PCMSK2 = 0;
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147 | PCICR = 0;
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148 |
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149 | // Timer/Counter 0-5 Interrupt(s) initializations
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150 | #ifdef RF_COORDINATOR
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151 | TIMSK0 = 0x02; // Fast PWM
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152 | #endif
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153 |
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154 | #ifdef RF_NODE
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155 | TIMSK0 = 0; // none
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156 | #endif
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157 |
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158 | TIMSK1 = 0x02; // CTC interrupt - 1ms
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159 | TIMSK2 = 0x01; // Overflow interrupt
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160 | TIMSK3 = 0x02; // CTC interrupt - 1s
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161 | TIMSK4 = 0;
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162 | TIMSK5 = 0;
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163 |
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164 | //+++++++++++++++++++++++++++++++++++++++
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165 | // USART0 initialization
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166 | // Communication Parameters: 8 Data, 1 Stop, No Parity
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167 | // USART0 Receiver: On
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168 | // USART0 Transmitter: On
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169 | // USART0 Mode: Asynchronous
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170 | UCSR0A = 0;
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171 | UCSR0B = 0xD8;
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172 | UCSR0C = 0x06;
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173 | UBRR0H = 0;
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174 | #ifdef BAUD38K4
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175 | // USART0 Baud Rate: 38400
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176 | UBRR0L = 0x19;
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177 | #else
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178 | // USART0 Baud Rate: 9600
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179 | UBRR0L = 0x67;
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180 | #endif
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181 |
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182 | // Analog Comparator unused
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183 | ACSR = 0x80;
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184 |
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185 | //+++++++++++++++++++++++++++++++++++++++
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186 | // ADC initialization
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187 | // ADC Clock frequency: 125,000 kHz
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188 | // ADC Voltage Reference: 1.6V internal
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189 | // ADC Auto Trigger Source: Free Running
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190 | ADMUX = ADC_INTREF1V6_10BIT;
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191 | ADCSRA = ADA_FREE_ICC_125K;
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192 | ADCSRB = ADB_FREE_RUN;
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193 | ADCSRC = ADC_TIMING;
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194 | // Digital input buffers on ADC0-ADC7: Off
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195 | // Digital input buffers on ADC8-ADC15: On
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196 | DIDR0 = 0xFF;
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197 | DIDR2 = 0;
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198 |
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199 | //+++++++++++++++++++++++++++++++++++++++
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200 | // Power savings, everything not needed turned OFF
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201 | PRR0 = OFF_TWI_PRPGA_SPI;
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202 | PRR1 = OFF_TIM5_TIM4_USART1;
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203 | PRR2 = 0;
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204 |
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205 | // Watchdog Timer initialization
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206 | // Watchdog Timer Prescaler: OSC/1024k
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207 | // Watchdog Timer interrupt: Off
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208 | #pragma optsize-
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209 | #asm("wdr")
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210 | WDTCSR = 0x39;
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211 | WDTCSR = 0x29;
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212 | #ifdef _OPTIMIZE_SIZE_
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213 | #pragma optsize+
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214 | #endif
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215 |
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216 | TX_length = 0;
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217 | TX0_go = 0;
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218 | RX0_counter = 0;
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219 | RX0_state = RX_IDLE;
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220 | for( i = 0; i < 8; i++ ) adc_valid[i] = 0;
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221 | }
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