Component mit Generics, 2 mal einbinden

  component AsyncFIFO

    generic(  Width : integer := 32;

          Depth : integer := 64;

          AdressWidth : integer := 6;

          RamTypeFifo : string := "Block");

    port(  ReadCLK : In std_logic;

        WriteCLK : In std_logic;

        ReadCE : In std_logic;

        WriteCE : In std_logic;

        RST : In std_logic;

        Din : In std_logic_vector(Width-1 downto 0);

        RE : In std_logic;

        WE : In std_logic;          

        Dout : Out std_logic_vector(Width-1 downto 0);

        Empty : Out std_logic;

        Full : Out std_logic);

  end component;

CommandFIFO: AsyncFIFO 

    generic map(Width => 26,

            Depth => 4,

            AdressWidth => 2,

            RamTypeFifo => "Distributed")

    port map(ReadCLK => CLK,

          WriteCLK => UI_CLK,

          ReadCE => CE,

          WriteCE => CE,

          RST => RST,

          Din => CommandFIFO_Din,

          Dout => CommandFIFO_Dout,

          RE => NewCommandEnable,

          WE => CMD_WE,

          Empty => CMD_Empty,

          Full => CMD_Full);

  DataInFIFO: AsyncFIFO 

    generic map(Width => 128,

            Depth => 16,

            AdressWidth => 4,

            RamTypeFifo => "Block")

    port map(ReadCLK => CLK,

          WriteCLK => UI_CLK,

          ReadCE => CE,

          WriteCE => CE,

          RST => RST,

          Din => DataIn,

          Dout => DataInput,

          RE => NewDataEnable,

          WE => DataIn_WE,

          Empty => DataIn_Empty,

          Full => DataIn_Full);

ERROR:Xst:2587 - Port <Dout> of instance <DataInFIFO> has different type in definition <AsyncFIFO>.