Hallo, guten Tag. Ich habe hier 2 Sync_Ram angelegt, die auch im RTL-Viewer erscheinen und auch im Flow Summary mit : Total memory bits 131072. Wenn ich die Adressen und die Daten usw mit In oder nur mit Out belege, kann ich in der Beschreibung keine Zahlen angeben. Also habe ich sie als Inout festgelegt. Jetzt kann ich die Adressen und Daten usw mit Werten beschreiben im Code. Die Pins erscheinen jetzt aber trotzdem noch im Pinplan, obwohl ich die gar nicht mehr brauche, weil es alles auch der Beschreibung mit Werten geht. Was muss jetzt bei den Pins im Pinplan angegeben werden? Danke. Gruss
1 | LIBRARY ieee; |
2 | USE ieee.std_logic_1164.ALL; |
3 | USE ieee.numeric_std.ALL; |
4 | |
5 | ENTITY ram IS |
6 | GENERIC
|
7 | (
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8 | ADDRESS_WIDTH : integer := 13; |
9 | DATA_WIDTH : integer := 8 |
10 | );
|
11 | |
12 | PORT
|
13 | (
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14 | clock : IN std_logic; |
15 | |
16 | we : inout std_logic; |
17 | data_in : inout std_logic_vector(DATA_WIDTH - 1 DOWNTO 0); |
18 | data_out : inout std_logic_vector(DATA_WIDTH - 1 DOWNTO 0); |
19 | write_address : inout std_logic_vector(ADDRESS_WIDTH - 1 DOWNTO 0); |
20 | read_address : inout std_logic_vector(ADDRESS_WIDTH - 1 DOWNTO 0); |
21 | |
22 | we1 : inout std_logic; |
23 | data_in1 : inout std_logic_vector(DATA_WIDTH - 1 DOWNTO 0); |
24 | data_out1 : inout std_logic_vector(DATA_WIDTH - 1 DOWNTO 0); |
25 | write_address1 : inout std_logic_vector(ADDRESS_WIDTH - 1 DOWNTO 0); |
26 | read_address1 : inout std_logic_vector(ADDRESS_WIDTH - 1 DOWNTO 0) |
27 | |
28 | );
|
29 | END ram; |
30 | |
31 | ARCHITECTURE rtl OF ram IS |
32 | TYPE RAM IS ARRAY(0 TO 2 ** ADDRESS_WIDTH - 1) OF std_logic_vector(DATA_WIDTH - 1 DOWNTO 0); |
33 | SIGNAL ram_block : RAM; |
34 | |
35 | TYPE RAM1 IS ARRAY(0 TO 2 ** ADDRESS_WIDTH - 1) OF std_logic_vector(DATA_WIDTH - 1 DOWNTO 0); |
36 | SIGNAL ram_block1 : RAM1; |
37 | |
38 | BEGIN
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39 | PROCESS (clock) |
40 | BEGIN
|
41 | IF (clock'event AND clock = '1') THEN |
42 | IF (we = '1') THEN |
43 | ram_block(to_integer(unsigned(write_address))) <= data_in; |
44 | END IF; |
45 | |
46 | data_out <= ram_block(to_integer(unsigned(read_address))); |
47 | END IF; |
48 | END PROCESS; |
49 | |
50 | PROCESS (clock) |
51 | BEGIN
|
52 | IF (clock'event AND clock = '1') THEN |
53 | IF (we1 = '1') THEN |
54 | ram_block1(to_integer(unsigned(write_address1))) <= data_in1; |
55 | END IF; |
56 | |
57 | data_out1 <= ram_block1(to_integer(unsigned(read_address1))); |
58 | END IF; |
59 | END PROCESS; |
60 | |
61 | PROCESS (clock) |
62 | BEGIN
|
63 | IF (clock'event AND clock = '1') THEN |
64 | we <='1'; |
65 | data_in <="11111111"; |
66 | write_address<="0000000000001"; |
67 | END IF; |
68 | END PROCESS; |
69 | |
70 | PROCESS (clock) |
71 | BEGIN
|
72 | IF (clock'event AND clock = '1') THEN |
73 | we1 <='1'; |
74 | data_in1 <="11111111"; |
75 | write_address1<="0000000000001"; |
76 | END IF; |
77 | END PROCESS; |
78 | END rtl; |