Forum: FPGA, VHDL & Co. On Chip Termination Cyclone IV FPGA


von E.P (Gast)


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Hello people!

I am wondering about how is the impedance output of the I/O pins of this 
FPGA. I have been reading the datasheet and I don't understand what is 
the meaning of the On Chip termination resistance and how to configure 
this option in a proper way.

First of all I am using an I/O standard 3.3-V-LVTTL and reading the 
"Termination Scheme for I/O Standards" of the datasheet:

"The 3.3-V LVTTL, 3.0-V LVTTL and LVCMOS, 2.5-V LVTTL and LVCMOS, 1.8-V
LVTTL and LVCMOS, 1.5-V LVCMOS, 1.2-V LVCMOS, 3.0-V PCI, and PCI-X
I/O standards do not specify a recommended termination scheme per the 
JEDEC
standard"

So it means that I can not use an OCT with this kind of I/O standard 
right? or what does it mean?

On the other hand having, the track in the PCB is routed to be in 
compliance with 50 Ohm requirements. So in the picture attached should I 
choose the termination option 50 Ohm right? Does it mean that I will put 
an internal source resistance in the FPGA I/O, right?

Thanks

von E.P (Gast)


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Hello again! I want to clarify what I need to do....

I am generating a 150 MHz clock with a 3.3V-LVTTL I/O FPGA pin and I 
want to know if it is possible to programm a internal source resistance 
of 50 Ohm to avoid reflections and other issues. If this is not possible 
then, I would like to know which the default Zo of the I/O pins.

Thanks!

von Erwin (Gast)


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I cannot say if the fpga is able to have series termination on 3.3V 
VCCIO at all. It has been a long time since I worked with cyclone iv so 
read the datasheet.
I would just give it a try - quartus will tell you if it is not able to 
implement the series termination on that pin.

The possible values are on page 114ff in 
https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/cyclone-iv/cyclone4-handbook.pdf 
-> 25 and 50 ohms. You need to have calibration resistors if you want to 
use calibration because of the much better accuracy and there are 
limitation regarding IO-Standard and used banks.

You can also use an external resistor for series termination. Just place 
a ~30 Ohm resistor near the sender. You can use tools like hyperlynx to 
simulate the signal integrity but I would say that should work out of 
the box. Anyways I would place a series termination resistor on every 
"outgoing" signal as long as the price is not very restricting.

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