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PDF
ks0073.pdf
RAM (CGRAM): 64×8 bits. (8 characters × 5 × 8 dot) - Segment Icon RAM (SEGRAM): 16×8 bits. (96 icons max.) - Display Data RAM (DDRAM): 80×8 bits. (80 characters max.) • Low power operation - Power supply voltage range: 2.7 to 5.5 V (VDD) - LCD Drive voltage range: 3.0 to 13.0 V (VDD to V5) • CMOS process
in „Probleme mit LCD“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AR0130_DS_D.pdf
mode Parameter TypicalValue Output Parallel 12-bit Excellent Near IR performance HD video (720p60) Max. 1.2MP(fullFOV) 45fps On-chip AE and statistics engine Frame 720pHD(reducedFOV) 60fps Auto black level calibration rates VGA(fullFOV) 45fps Context switching VGA(reducedFOV) 60fps Progressive Scan 800x800
in „Auswahl des richtigen dsp“ · Digitale Signalverarbeitung / DSP / Machine Learning ·
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PDF
ATmegaXX4.pdf
TOM. There are two cases that give a transition without Compare Match. OCR0A changes its value from MAX, like in Figure 14-7. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must correspond
in „Atmega644PA Timer3“ · Mikrocontroller und Digitale Elektronik ·
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PDF
pm2519ocr.pdf
button “zero set on/off” 1.6. D C C U R R E N T M E A S U R E M E N T S Ranges :20mA,20mA,2.4,208 (max, input current in highest range) #10 A (20 A for max, 20 sec.) Resolution 510HAin20mArange Number of representation units £2200 Acuracy ++(0.5%ofreading+0.1%offulscale) Temperature coefficient +0.05%
in „Pjilips PM2519“ · Markt ·
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PDF
ST7789V.pdf
320 Channels - Common Electrode Output ! Display Colors (Color Mode) - Full Color: 262K, RGB=(666) max., Idle Mode Off - Color Reduce: 8-color, RGB=(111), Idle Mode On ! Programmable Pixel Color Format (Color Depth) for Various Display Data input Format - 12-bit/pixel: RGB=(444) - 16-bit/pixel: RGB=(
in „LilyGo T-Watch 2020 v1 Micropython“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AT90CAN128.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 12
in „uC + 3 Schieberegister + 7-Segmentanzeige“ · Mikrocontroller und Digitale Elektronik ·
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PDF
mega644.pdf
TOM. There are two cases that give a transition without Compare Match. OCR0A changes its value from MAX, like in Figure 12-7. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must correspond
in „AVR Controller braucht zu viel Strom“ · Mikrocontroller und Digitale Elektronik ·
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Datei
debug_error.asm
604: 80 93 02 01 sts 0x0102, r24 608: 08 95 ret 0000060a <lib_nRF24L01_get_data>: // Read at most maxBytes bytes from received packet data into array payload. // Note that the nRF24L01+ deletes the whole FIFO slot afterwards. void lib_nRF24L01_get_data( uint8_t * payload, uint8_t maxBytes) { 60a: ff
in „Fehler bei einfacher Integer-Division?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
oki-ml380_000.pdf
PPR, IBM X24 AGM Cut Sheet Feeder Not Installed Installed Graphics Uni-Directional, Bi-Directional Max Receive Buffer 8 K, 1 Line, 40 K (Option) Paper Out Override No, Yes Print Registration 0, -1, -2, -3, -4, -5 +5, +4, +3, +2, +1 Operator Panel Function Full Operation, Limited Operation Reset Inhibit
in „USB zu RS232“ · Mikrocontroller und Digitale Elektronik ·
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PDF
88E1111_DS.pdf
#ns m L Rf_CLLL co DA S V 1zzV. Instantaneous change during internal mIH_NMII (Min.) andvVIL_GMII (Max.)T operation. A u3Figure 47: GMII Receive Timing Se R a M 7v MA l DE * TP_GMII_RX_CLK rveU N d TH_GMIITL_GMII_RX_CaK L, 8 RX_CLK *M I OH_GMII (Min.) e TF_GMII_RX_CLK geTRNGMII_RX_CLKMII (Max.) u RXD
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PDF
DM8603EP.pdf
portEthernetSwitchControllerwithMII/RMIIInterface 10.4.4 Port 2 RMII Interface Transmit Timing Symbol Parameter Min. Typ. Max. Unit T1 RMII REF_CLK Period - 20 - ns T2 P2_TXE,P2_TXD1~0 to REF_CLK 8 ns Rising Output Delay 10.4.5 Port 2 RMII Interface Receive Timing Symbol Parameter Min. Typ. Max. Unit T1 RMII REF_CLK Period
in „2 Port Switch IC wie in IP telefonen?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
DM8603EP.pdf
portEthernetSwitchControllerwithMII/RMIIInterface 10.4.4 Port 2 RMII Interface Transmit Timing Symbol Parameter Min. Typ. Max. Unit T1 RMII REF_CLK Period - 20 - ns T2 P2_TXE,P2_TXD1~0 to REF_CLK 8 ns Rising Output Delay 10.4.5 Port 2 RMII Interface Receive Timing Symbol Parameter Min. Typ. Max. Unit T1 RMII REF_CLK Period
in „[V] DM8203 & DM8603“ · Markt ·
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PDF
LGDP4524.pdf
capacitor to each capacitor connection pin. 3. Set the following voltages within the limits: DDVDH = max 5.5V, VCL = min –3.3V, VGH = max 16.5V, VGL = min –16.5V. nd DUAL – Controls the operndion of the 2 step-up circuit 1.This bit can be enablestin only condition DK=1 to prevent the 2 step up circuit
in „LCD farben invertiert normal ?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
wr2_rcm_revb.pdf
equation>’ Functionequationas definedbelow LENGTH <length> Number of points tousefrom first waveform MAX_EVENTS <max_values> Maximum number of values inhistogram MAXBINS <bins> Number of bins in histogram MAXPTS <max_points> Maximum number of points tocompute 1 06 ISSUED: January2002 LTXXX-RCM-E Rev B
in „Oszi einstellen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
magnetic.pdf
which has two extreme values along the hysteresis curve Bx,1− B x,2 B x,1− B x,2 µmin = min , and µ max = max . (5.58) H x,1Hx,2H x,1− H x,2 Hx,1,Hx,2H x,1− H x,2 Hereµ min andµ max aretheminimumandmaximumslopeofthehysteresischaracteristics. The inequality µmin ≤ µ ≤ µ max (5.59) is obvious, from which
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PDF
MS-17631_2.0.pdf
▯ } I ( ▯ 2 › 2 LED Driver IC ▯ D O ▯ î C ▯ +12V_FAN LED Forward Voltage E 2 2 1 1 SDICS ▯ +15V R_Max 2.4V x 4 pcs = 9.6V L L L L SDI_CLKL ) For EMI ▯ 3 3 3 2 2 2 1 1 1 G_Max 3.3V x 4 pcs = 13.2V C227 C100p50N0402 LED1_G L L L L L L L L L Pin Definerd 6 5 4 3 2 1 O ▯ C567 C100p50N04N2 LED1_R B_Max 3.3V
in „In Circuit Programmierer für 8-pin 150mil SOIC PM25LD512“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Testboard_KK32F7.PDF
RMIISEL PIX30109 POMII_RX_ER PHYAD0 PIU30RXERR/RXD4/PHYAD0 PIX301K_GREEN NC PIX30104 POMII_RX_CLKK R3PIR312PIR31202 PHYAD1 PIU30RXCLK/PHYAD1 PIX301K_YELLOW NC PIX30105 POMII_RX_DV R3PIR313PIR31302 PIU30RXDV PIX301A_YELLOW NC PIX30106 POMII_TXD0 PIU30TXD0 LED1/REGOFF PIU30103 LU1S041X-43 P MII_TXD10 T X D
in „STM32F7 Discovery Board“ · Mikrocontroller und Digitale Elektronik ·
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PDF
oncilla_schaltplaene.pdf
1uF 400V 100K / 2W LAMP NEON C 1 +220V 1mA max. OFF-Spannung für Nixie-Röhren R5103 R5104 1M5 1K R5114 110K V5102A 7 EF80 R5108 18K R5110 9 68K 2W 8 2 R5109 68K R5111 C5107 100K 0,22uF 1 B P5101 J5104 B MF4 1 3386P 10K V5103 +300V 1 85A2 C5106 +
in „Unbekannter Geräteeinschub (Impulszähler)“ · Mikrocontroller und Digitale Elektronik ·
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PDF
BE-412-B-MONITOR-HEIDENHAIN-MANUAL.pdf
Spannungen den nachfolgenden Definitionen entsprechen: Einheit versorgungs-Spannungannungsbereich max. Stromaufnahmeeistungsaufnahme GlcichspannungrmiseIwen NC-Teil24” ““lergrenze 11.5A ca3ow LE 355 (VDE0551) 20.4 V - PLC-Teil 1.8A W.6W fEin-/Ausg&ge gleAusgange gleichzeitig1 24 V zeitig gerchallefgeschaltet
in „CRT Monitor gegen VGA Monitor tauschen“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
Sager_D87P_Service_Manual_Part4.pdf
C522 RT9701CBL 0.1U 4.7U(0805) 4.7U(0805) B - 21 Schematic Diagrams RAID PDC20265R VCC3 C801 C316 C312 C313 0.1U 1U 4.7U(0805) 4.7U(0805) L70 R_SDA0 R262 1K VCC5 R676 3.6 1 2 BK2125HS121 R_SDA1 R263 1K R_PCS1# R621 1K C319 C318 C815 VCC5 R_PPHD[0:15] R_PPHD[0:15] [22] 0.1U 4.7U(0805) 0.1U C811 C810 C803
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PDF
HD66773.pdf
potentiometer • Output power-supply voltage For the TFT-display counter electrode: Vcom amplitude = 6V (max), VcomH-GND =VREG1OUT (max), VcomL-GND= Vci + 1.0V to –Vci+0.5V (max) • Internal RAM capacity: 46,464 bytes • Internal operation circuit of liquid crystal display Source signal: 396 Gate signal: 176
in „The Siemens S65 132x176, 65536 color display with AVR“ · Projekte & Code ·
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PDF
HD66773.pdf
potentiometer • Output power-supply voltage For the TFT-display counter electrode: Vcom amplitude = 6V (max), VcomH-GND =VREG1OUT (max), VcomL-GND= Vci + 1.0V to –Vci+0.5V (max) • Internal RAM capacity: 46,464 bytes • Internal operation circuit of liquid crystal display Source signal: 396 Gate signal: 176
in „The Siemens S65 132x176, 65536 color display with AVR“ · Projekte & Code ·
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PDF
Panasonic_JD_700_800_Series_Service_Manual_1_.pdf
voltage: 120V 'V±10% 220/240V'V ±10% • Input frequency: 50-60Hz • Output voltage/current: +12V/3.3A max. +SV/SA max. -12V/O.IA max. • Overall stability: ±S% or less 3 - 1 ~ JD·70n40 lAC 100Vl120V - ) TRANSFORMER TO FLOPPY UNIT1 TO FLOPPY UNIT2 w AC/DC DISTRIBUTION SBCTII (/-480424-0) (1-480424 -0) »c.
in „Heidenhain Monitor BE 212 für TNC 351“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
AT90CAN128.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 12
in „Umrechnen von analog to digital“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AD7193.pdf
min SCLK low pulse width READ OPERATION 1 0 ns min CS falling edge to DOUT/ RDY active time 60 ns max DV DD = 4.75V to 5.25V 80 ns max DV DD = 2.7V to 3.6V 23 0 ns min SCLK active edge to data valid delay 4 60 ns max DV DD = 4.75V to 5.25V 80 ns max DV DD = 2.7V to 3.6V 55, 6 10 ns min Bus relinquish time after CS inactive edge 80 ns max 6 0 ns min SCLK inactive edge to CS inactive edge 7 10 ns min SCLK inactive edge to DOUT/ RDY high WRITE OPERATION 4 8 0 ns min CS falling edge to SCLK active edge setup time 9 30 ns min Data validto
in „USB-Soundkarte zu einem Spannungslogger umbauen, wie die Eingänge schützen?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
USB_Type-C_Spec_R2.1_-_May_2021.pdf
plug or receptacle. See Figure 3-66. The following apply to the power and signal contacts: • 40 mΩ (Max) initial for V BUS, GND and all other contacts. • 50 mΩ (Max) after environmental stresses. • Measure at 20 mV (Max) open circuit at 100 mA. Refer to Section 3.8 for environmental requirements and test
in „USB-C Dual-Role-Device DRD mit integriertem OTG FS PHY“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATMega164_324_644_1284pa.pdf
TOM. There are two cases that give a transition without Compare Match. OCR0A changes its value from MAX, like in Figure 15-7. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must correspond
in „Hilfe bei AD-Wandler!“ · Mikrocontroller und Digitale Elektronik ·
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PDF
KS0073.pdf
character reverse display • Display shift per line • Voltage converter for LCD drive voltage : 13 V max (2 times / 3 times) • Various instruction functions • Automatic power on reset FEATURES • Internal Memory - Character Generator ROM (CGROM) : 9,600 bits (24 0 characters × 5 × 8 dot) - Character Generator
in „Eigene Zeichen bei LCD mit KS0073 für blöde“ · Mikrocontroller und Digitale Elektronik ·
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PDF
8XCE558.pdf
outputs unless otherwise specified. 12MHz CLOCK 16MHz CLOCK VARIABLE CLOCK SYMBOL FIGURE PARAMETER MIN MAX MIN MAX MIN MAX UNIT 1/CLK 60 System clock frequency 3.5 16 MHz tLHLL 60 ALE pulse width 127 85 2tCLK–40 ns tAVLL 60 Address valid to ALE LOW 43 23 CLK–40 ns tLLAX 60 Address hold after ALE LOW 53 33
in „Gesucht: schnelles 8051-Derivat mit Bootloader“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Eagle_DataSheet_V2.8_english.pdf
of BRAM9K 12 48 64 96 Number of BRAM32K 2 2 16 32 Total BRAM bits 176,128 507,904 1,114,112 1,933,312 Number of DSP 11 21 29 144 PLL 4 2 4 4 Low-skew gclock in chip 16 16 16 16 User IO Banks 0 8 8 8 Maximum user Ios 270 184 270 456 Table 1-1-2 EAGLE FPGA Package Packages EAGLE_4 EAGLE_10 EAGLE_20 EAGLE
in „Sipeed Lichee Tang FPGA mit RISC-V Core aus China unter 20€“ · FPGA, VHDL & Co. ·
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PDF
Eagle_DataSheet_V2.8_english.pdf
of BRAM9K 12 48 64 96 Number of BRAM32K 2 2 16 32 Total BRAM bits 176,128 507,904 1,114,112 1,933,312 Number of DSP 11 21 29 144 PLL 4 2 4 4 Low-skew gclock in chip 16 16 16 16 User IO Banks 0 8 8 8 Maximum user Ios 270 184 270 456 Table 1-1-2 EAGLE FPGA Package Packages EAGLE_4 EAGLE_10 EAGLE_20 EAGLE
in „SDRAM Burst lesen ohne Unterbrechung über Column, Row und Banks hinaus“ · FPGA, VHDL & Co. ·
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PDF
DW-65054-dg_at_2006--10_r17a.pdf
to CS (Circuit Switched) data calls. Set command: AT+DS=[<direction>[,<compression_negotiation>[,<max_dict>[,<max- string>]]]] Read command: AT+DS? Displays the current <direction>, <compression_negotiation>, <max_dict> and <max_string> settings. Test command: AT+DS=? Shows if the command is supported
in „Wie mit GPRS über AT Commands verbinden?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Hewlett_Packard_Operating_and_Service_Manuals_for_HP361XA_30W_Bench_Series_DC_Power_Supplies.pdf
CHARACTERISTICS E3612A: 0 to 60 V, 0 to 0.5 A or 0 to 120V, to 0.25 A A Veitt LOAD REGULATION: Vo, Pour MAX Constant Voltage - Less than 0.01 % plus 2 mV for a full load to rto load change in output current. 30 Watts Constant Current - Less than 0.01 % plus 1 mA for a zero to maximum change in output voltage
in „Gebrauchtes Labornetzteil HP Agilent“ · Mechanik, Gehäuse, Werkzeug ·
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PDF
atmel-8393-mcu_wireless-atmega256rfr2-atmega128rfr2-atmega64rfr2_datasheet.pdf
address. 9.12.50 XAH_CTRL_0 – Transceiver Extended Operating Mode Control Register Bit 7 6 NA ($16C) MAX_FRAME_RETRIES3 MAX_FRAME_RETRIES2 XAH_CTRL_0 Read/Write RW RW Initial Value 0 0 Bit 5 4 NA ($16C) MAX_FRAME_RETRIES1 MAX_FRAME_RETRIES0 XAH_CTRL_0 Read/Write RW RW Initial Value 1 1 Bit 3 2 NA ($16C) MAX_CSMA_RETRIES2 MAX_CSMA_RETRIES1 XAH_CTRL_0 Read/Write RW RW Initial Value 1 0 Bit 1 0 NA ($16C) MAX_CSMA_RETRIES0 SLOTTED_OPERATION XAH_CTRL_0 Read/Write RW RW Initial Value 0 0 This register is used
in „AVR-Verlustleistung maximieren“ · Mikrocontroller und Digitale Elektronik ·
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Datei
clk_wiz_0.xml
xilinx:parameterInfo> </spirit:vendorExtensions> </spirit:parameter> <spirit:parameter> <spirit:name>MAX_BURST_LENGTH</spirit:name> <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_LITE.MAX_BURST_LENGTH">1</spirit:value> <spirit:vendorExtensions> <xilinx:parameterInfo
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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Datei
clk_wiz_0.xml
xilinx:parameterInfo> </spirit:vendorExtensions> </spirit:parameter> <spirit:parameter> <spirit:name>MAX_BURST_LENGTH</spirit:name> <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_LITE.MAX_BURST_LENGTH">1</spirit:value> <spirit:vendorExtensions> <xilinx:parameterInfo
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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Datei
clk_wiz_0.xml
xilinx:parameterInfo> </spirit:vendorExtensions> </spirit:parameter> <spirit:parameter> <spirit:name>MAX_BURST_LENGTH</spirit:name> <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_LITE.MAX_BURST_LENGTH">1</spirit:value> <spirit:vendorExtensions> <xilinx:parameterInfo
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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Datei
clk_wiz_0.xml
xilinx:parameterInfo> </spirit:vendorExtensions> </spirit:parameter> <spirit:parameter> <spirit:name>MAX_BURST_LENGTH</spirit:name> <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_LITE.MAX_BURST_LENGTH">1</spirit:value> <spirit:vendorExtensions> <xilinx:parameterInfo
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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PDF
AT90PWM2_2B_3_3B__2_.pdf
TOM. There are two cases that give a transition without Compare Match. OCRnx changes its value from MAX, like in Figure 14-7. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCnx value at MAX must correspond
in „Interrupt bem Flankenwechsel beim AVR“ · Mikrocontroller und Digitale Elektronik ·
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PDF
at90pwm3.pdf
TOM. There are two cases that give a transition without Compare Match. OCRnx changes its value from MAX, like in Figure 14-7. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCnx value at MAX must correspond
in „Schrittmotorsteuerung mir 90atPWM3“ · Mikrocontroller und Digitale Elektronik ·
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Datei
DOGM162W-A.asm
---------------------------+ ; FOC2 = 0 (for future use) ; WGM21 WGM20 ; 0 0 Normal, TOV2 Flag Set MAX ; 0 1 PWM, Phase Correct ; 1 0 CTC, Top OCR2 ; 1 1 Fast PWM, Top 0xFF ; ; COM21 COM20 Non PWM Mode ; 0 0 Normal Port Operation ; 0 1 Toggle B.3 Pin17 On Compare Match ; 1 0 Clear B.3 Pin17 On Compare
in „DVM mit DOGM162W-A, ATMEGA8A, AVRASM“ · Projekte & Code ·
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PDF
doc7593.pdf
TOM. There are two cases that give a transition without Compare Match. OCR0A changes its value from MAX, like in Figure 13-7. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must correspond
in „Problem mit dem TC4469“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AVR_ATmega_328PB.pdf
set. The first figure below illustrates timing data for basic Timer/Counter operation close to the MAX value in all modes other than Phase Correct PWM mode. Figure 19-8 Timer/Counter Timing Diagram, no Prescaling clkI/O clkTn (clI/O1) TCNTn MAX - 1 MAX BOTTOM BOTTOM + 1 TOVn The next figure shows the
in „ATmega328PB: UART(MC) empfängt falsche Daten“ · Mikrocontroller und Digitale Elektronik ·
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PDF
GD32F3x0_RM_v1.0.pdf
3:2 OSPD1[1:0] Pin 1 output max speed bits These bits are set and cleared by software. Refer to OSPD0[1:0] description 1:0 OSPD0[1:0] Pin 0 output max speed bits These bits are set and cleared by software. x0: Output max speed 2M (reset value) 01: Output max speed 10M 11: Output max speed 50M 7.4.4. Port pull-up/down register (GPIOx_PUD, x=A..D,F) Address offset: 0x0C Reset value: 0x2400 0000 for port A; 0x0000 0000 for others. This register can be accessed
in „"NUCLEO"-Borads von GigaDevice“ · Mikrocontroller und Digitale Elektronik ·
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PDF
GD32F3x0_RM_v1.0.pdf
3:2 OSPD1[1:0] Pin 1 output max speed bits These bits are set and cleared by software. Refer to OSPD0[1:0] description 1:0 OSPD0[1:0] Pin 0 output max speed bits These bits are set and cleared by software. x0: Output max speed 2M (reset value) 01: Output max speed 10M 11: Output max speed 50M 7.4.4. Port pull-up/down register (GPIOx_PUD, x=A..D,F) Address offset: 0x0C Reset value: 0x2400 0000 for port A; 0x0000 0000 for others. This register can be accessed
in „"NUCLEO"-Borads von GigaDevice“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Yaskawa-SGDB-xxADx-x-TSE-S800-16E.pdf
Apply the holding brake at the same time as the Servo ON. * 2 The mechanical contact takes 180 ms max. to be opened when the brake is turned ON and 100 ms max. to be closed when turned OFF. * 3 Allow 200 ms or more between the moment when the brake is turned ON and when the speed reference is input.
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PDF
PIC_32_MX_110_F_016_-_I-SO__11-2-3___SO_28_.pdf
Ratio 55 — — dB Max V ICM= (VDD - 1)V (Note 2) D303 TRESP Response Time — 150 400 ns AV DD= VDD , AV SS= VSS (Notes 1,2) D304 ON2 OV Comparator Enabled to Output — — 10 μs Comparator module is Valid configured before setting the comparator ON bit (Note 2) D305 IVREF Internal Voltage Reference 1.14 1.2 1.26 V — D312 TSET Internal Voltage Reference — — 10 µs — Setting time (Note 3) Note 1: Response time measured with one comparator input aDD(– 1.5)/2, while the other input transitions from VSSto VDD. 2: These parameters
in „pic32 flash und i/o speed“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PIC_32M_X_220_F_032_B-50I-SP_____DIP_28_.pdf
Ratio 55 — — dB Max V ICM= (VDD - 1)V (Note 2) D303 TRESP Response Time — 150 400 ns AV DD= VDD , AV SS= VSS (Notes 1,2) D304 ON2 OV Comparator Enabled to Output — — 10 μs Comparator module is Valid configured before setting the comparator ON bit (Note 2) D305 IVREF Internal Voltage Reference 1.14 1.2 1.26 V — D312 TSET Internal Voltage Reference — — 10 µs — Setting time (Note 3) Note 1: Response time measured with one comparator input aDD(– 1.5)/2, while the other input transitions from VSSto VDD. 2: These parameters
in „PIC32MX flash access time“ · Mikrocontroller und Digitale Elektronik ·
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PDF
047304JES_2013.pdf
αa αa is used to provide constant temperature environment for all the tests. i0= k T c c (s,i e s,max− c s,i [9] Thermocouples are used to measure the cell surface temperature, Mapping between reaction current density on particle surface and located midway along the length of the 18650 cells. In order
in „Lithium Ionen Batterie auf 4,2V bei 0°C aufladen sicher?“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
SSD1353_0.11.pdf
SA125 310 SB98 390 SC71 71 COM81 151 SB151 231 SC124 311 SA98 391 SB71 72 COM79 152 SA151 232 SB124 312 SC97 392 SA71 73 COM77 153 SC150 233 SA124 313 SB97 393 SC70 74 COM75 154 SB150 234 SC123 314 SA97 394 SB70 75 COM73 155 SA150 235 SB123 315 SC96 395 SA70 76 COM71 156 SC149 236 SA123 316 SB96 396 SC69
in „RitDisplay RTS18160128FHC04 P16885 1,8" OLED Touch STM8“ · Mikrocontroller und Digitale Elektronik ·