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UM10398_-_LPC11xx_UserManual.pdf
10 1 1 1 1 1 1 1 2 2 2 2 2 002aaf266 K _ C D T _ X D X _ K T _ C O / / A O R T O C / O / P _ _ _ P N N P 6 _ P S 0 0 B A A _ 0 / I I 6 C C O I _ P P T P P 2 / I _ P 1 P Fig 12. Pin configuration LQFP48 package UM10398 All information provided in this document is subject to legal dis© NXP B.V. 2011.
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PDF
Littelfuse_PTC_SMD_Catalog_Datasheet.pdf-1021736.pdf
/1.00Ω 6V /1.40Ω 16V /1.35Ω 6V /1.30Ω — — DC DC DC DC 0.500 — 6V /0.80Ω 13.2V /0.75Ω 13.2V /0.90Ω 24V /1.00Ω — DC DC DC DC 0.750 — 6V /0.35Ω* 6V /0.30Ω 6V /0.40Ω 13.2V /0.45Ω — DC DC DC DC — — — — 24VDC/0.29Ω — — — — — 33VDC/0.39Ω — 1.000 — — — — — 15VDC0.40Ω — — — — — — 1.100 — 6VDC0.17Ω* 6VDC0.20Ω 6VDC0.21Ω 8VDC0.21Ω — — — — — 16VDC/0.18Ω — — — — — 24VDC/0.18Ω — 1.200 — — — — — — 1.250 — — — — 6V /0.14Ω — DC — — — — 16V /0.14Ω — DC 1.500 — — 6VDC/0.11Ω 6VDC0.11Ω 6VDC0.11Ω 15VDC0.18Ω
in „[V] 24 St. Selbstrückstellende Polyswitch SMD Littlefuse SMD200F-2 2A/15V“ · Markt ·
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PDF
VisiLogic_-_Communications.pdf
Port / Port M odule Adapter D-Type 15 pin, RJ11 RJ11 Controller signals male signals DCD (out) 1 1 6 DSR (in) GND 9 2 5 GND RXD (out) 6 3 4 RXD (in) TXD (in) 2 4 3 TXD (out) GND 9 5 2 GND DSR (out) + 7+12 6 1 DTR (out) RTS (in) Note The cable connects RJ11 pins 2,3,4,5 to pins 5,4,3,2 respectively.
in „USB-Host / industrielle SPS / Frequency Counter“ · Mikrocontroller und Digitale Elektronik ·
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Datei
report_all.txt
_pim_0/comp_plbv46_pim/GENERATE_SINGLES_PLBV46_PIM.PIM_ADDRESS_DECODER/CLOCK_TO_N_SAMPLE_CIRCUIT/plb_rst_pipe_1_6> <DDR_SDRAM/PLB_0_INST.plbv46_pim_0/comp_plbv46_pim/GENERATE_SINGLES_PLBV46_PIM.PIM_ADDRESS_DECODER/CLOCK_TO_N_SAMPLE_CIRCUIT/plb_rst_pipe_1_7> <DDR_SDRAM/PLB_0_INST.plbv46
in „Place and Route partially locked IO bus“ · FPGA, VHDL & Co. ·
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PDF
11000.pdf
-bit Master transmitter S Header A Address A Data1 A DataN A P ..... EV5 EV9 EV6 EV8 EV8 EV8 10-bit Master receiver: Sr Header A Data1 A DataN A P ..... EV5 EV6 EV7 EV7 Legend: S=Start, Sr = Repeated Start, P=Stop, A=Acknowledge, NA=Non-acknowledge, EVx=Event
in „Programmierung von ST72F321Bj9“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PIC32MX3XX_Data_Sheet.pdf
Technology Inc. PIC32MX3XX/4XX Pin Diagram (64-Pin General Purpose) 64-Pin TQFP (General Purpose) 4 D / 1 N D 5 E / I O 4 5 E E E E E D 7 6 N C 3 2 1 / / / / / E D R R / / D D D 4 3 2 1 0 R P 6 5 D R / / / D D D D D 1 0 V A 1 1 R W C C C P P P P P RF R E V C C P P O O O 6 6 6 6 6 5 5 5 5 5 5 5 5 5 5 4 PMD5
in „PIC32 und Assembler“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Preisliste_2008-09_Stand_Aug08.pdf
Units 2359,00 F72250 102025 MasterAmpTfl DNA Polymerase + Puffer, 1 U/μl ❄ 250 Units 145,00 F72250N 101126 MasterAmpTfl für PreMixe,1 U/μl ❄ 250 Units 142,00 F72500 102050 MasterAmpTfl DNA Polymerase + Puffer, 1 U/μl ❄ 500 Units 279,00 FB3760 102005 MasterAmpTfl 20X PCR Puffer ❄ 6 ml 64,00 FB4250 106009
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PDF
murata_caps.pdf
Low ESL Type) T 1. Low ESL, good for noise reduction for high frequency 4 2. Small, high cap D im e n sio n s (m m ) P a rt N u m b e r L W T Applications 0 .5 0 .0 5 1 .0 0 .0 5 0 .3 0 .0 5 1. High speed micro processor L L L 1 8 5 0 .8 0 .1 1 .6 0 .1 0 .6 m ax. L L L 2 1 5 0 .5 + 0 /-0 .1 5 2. High
in „100nF SMD Entstörkondensator / Brand“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
M16C62_Hardware.pdf
Timers’ functions for three-phase motor control ) ) 0 1 2 3 7 5 8 8 7 P ( P ( ( ( V W ( . U U V W n o s t n i 5 Q R P D - 3 7 V P I t d n E I , S N 0 8 R V P I 0 P 5 o V t I i h Q Q Q Q Q Q i t D T D T D T D T D T D T s b r s f u m e r t a u D r n l l I a u a a a g u g i i i l l c 6 6 s o s t t c n
in „M16C Parallel pinbelegung“ · Mikrocontroller und Digitale Elektronik ·
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PDF
sh7020.pdf
Interrupt Exception Processing Figure 5.3 shows the stack after interrupt exception processing. Address 4n–8 PC* 2 Upper 16 bits SP* 3 4n–6 Lower 16 bits 4n–4 SR Upper 16 bits 4n–2 Lower 16 bits 4n Notes: 1. Bus width is 16 bits. 2. PC stores the top address of the next instruction (return instruction) after
in „welche GPS-Maus ?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Xilinx.pdf
tr o l P in s E x a m p le 2 F U N C T IO N S IZ E C O N T R O L P IN S F lip -F lo p , D -ty p e 1 6 -B it R e s e t (S y n c h r o n o u s ) C lo c k E n a b le F D 1 6 R E X 7 7 6 4 P r e c e d e n c e o f C o n tr o l P in s Naming
in „Unterschied zwischen Spartan - und Virtex Familie“ · FPGA, VHDL & Co. ·
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PDF
___MPASM_USER_S_GUIDE_with_MPLINK_and_MPLIB.pdf
generated by different statements involving strings. 7465 7374 696E dw “testing output string one\n” 6720 6F75 7470 7574 2073 7472 696E 6720 6F6E 650A #define str “testing output string two” B061 movlw “a” 7465 7374 696E data “testing first output string” 6720 6669 7273 7420 6F75 7470 7574 2073 7472
in „Anfängerfrage zu Assembler“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PicoMite_User_Manual_4_.pdf
constant and is drawn using the first byte as the first bits of the top line (bit 7 first, then bit 6, etc) followed by the next byte, etc. When the top line has been filled the next line of the displayed bitmap will start with the next bit in the integer or string. POLYGON n, xarray%(), yarray%()
in „Qual der Wahl - Sensoren Auswertung auf Display ("Analog")“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AN332.pdf
( 7 y n e 6 q r F n 5 t s n 4 r r t 3 i t u i 2 H w = 0x1A00: FM_HICUT_SNR_HIGH_THRESHOLD (0-127 dB) x = 0x1A01: FM_HICUT_SNR_LOW_THRESHOLD (0-127 dB) 1 y = 0x1A06: FM_HICUT_CUTOFF_FREQ[2:0] (0-7) z = 0x1A06
in „Radioempfang: Mono statt Stereo erzwingen, UKW“ · HF, Funk und Felder ·
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PDF
ESP_Tubes.pdf
any player would even notice. You can also see that the 2.7k cathode resistor is bypassed with a 680nF cap. This creates a 6dB/ octave rolloff below about 100Hz. As you can see, there are many interdependent parameters, and it is impractical to try to analyse every nuance. Adjusting either volume control
in „EL34 Kathodenwiderstand nachrüsten“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
SAM-V71Q-SAM-V71N-SAM-V71J_Datasheet.pdf
Power VDDUTMII – – – – – – – – – – – – O E - T 136 B4 VDDUTMII USBHS HSDM I/O – – – – – – – – – – – 6 ] 137 A4 VDDUTMII USBHS HSDP I/O – – – – – – – – – – – 44,61,95, F5, F6, G4, GND Ground GND – – – – – – – – – – – – 2 115,135,138 G5, G6, G7 1 2 2 Table 6-1. 144-lead Package Pinout (Continued) Primary
in „Atmel SAMV71 CAN FD“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATtiny841_Datasheet.pdf
) S O O I / / A 1 D X / / K 2 C / / 4 5 C C O O / / 0 1 C C / / 5 6 C C A A 5 6 T T I I P P ( ( 5 N N N 6 P D D D P A 0 9 8 7 6 2 1 1 1 1 (PCINT4/ADC4/AIN11/TOCC3/T1/RXD1/SCL/SCK) PA4 1 15 PA7 (PCINT7/ADC7/TOCC6/ICP1/TXD0/SS) (PCINT3/ADC3/AIN10/TOCC2/T0/XCK0/SCK) PA3
in „TOCPMSA1 und TOCPMCOE Verhalten beim Attiny 841“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATtiny441_841.pdf
) S O O I / / A 1 D X / / K 2 C / / 4 5 C C O O / / 0 1 C C / / 5 6 C C A A 5 6 T T I I P P ( ( 5 N N N 6 P D D D P A 0 9 8 7 6 2 1 1 1 1 (PCINT4/ADC4/AIN11/TOCC3/T1/RXD1/SCL/SCK) PA4 1 15 PA7 (PCINT7/ADC7/TOCC6/ICP1/TXD0/SS) (PCINT3/ADC3/AIN10/TOCC2/T0/XCK0/SCK) PA3
in „Suche nach ATtiny mit ADC und Gain > 20x“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATtiny841_Datasheet.pdf
) S O O I / / A 1 D X / / K 2 C / / 4 5 C C O O / / 0 1 C C / / 5 6 C C A A 5 6 T T I I P P ( ( 5 N N N 6 P D D D P A 0 9 8 7 6 2 1 1 1 1 (PCINT4/ADC4/AIN11/TOCC3/T1/RXD1/SCL/SCK) PA4 1 15 PA7 (PCINT7/ADC7/TOCC6/ICP1/TXD0/SS) (PCINT3/ADC3/AIN10/TOCC2/T0/XCK0/SCK) PA3
in „sleep und Interrupt“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATtiny841_Datasheet.pdf
) S O O I / / A 1 D X / / K 2 C / / 4 5 C C O O / / 0 1 C C / / 5 6 C C A A 5 6 T T I I P P ( ( 5 N N N 6 P D D D P A 0 9 8 7 6 2 1 1 1 1 (PCINT4/ADC4/AIN11/TOCC3/T1/RXD1/SCL/SCK) PA4 1 15 PA7 (PCINT7/ADC7/TOCC6/ICP1/TXD0/SS) (PCINT3/ADC3/AIN10/TOCC2/T0/XCK0/SCK) PA3
in „Takt-Vorskalierungsregister beim Attiny841“ · Mikrocontroller und Digitale Elektronik ·
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PDF
avr-libc-user-manual-1.8.0.pdf
. If __x or __y or both are NaN, NaN is returned. 23.6.3.13 double floor ( double x ) The floor() function returns the largest integral value less than or equal to __x, ex- pressed as a floating-point number. 23.6.3.14 double fma ( double
in „Interrupt Probleme beim Arduino“ · Mikrocontroller und Digitale Elektronik ·
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PDF
slod006b.pdf
. Equation 3–6 is the output equation when Vnd V are grounded. Equations 3–7 and 3–8 are the other 1 2 superposition equations, and the final result is given in Equation 3–9. R F VOUTN + * R V N (3–6) N RF V OUT1 +
in „Einfache Verstaerkerschaltung mit OP“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
OP_Amps_for_slod006b.pdf
. Equation 3–6 is the output equation when Vnd V are grounded. Equations 3–7 and 3–8 are the other 1 2 superposition equations, and the final result is given in Equation 3–9. R F VOUTN + * R V N (3–6) N RF V OUT1 +
in „Vor- und Nachteile: Unipolare vs. Bipolare Spannungsversorgung bei OpAmps“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
ATMega164_324_644_1284pa.pdf
0 0x00 (0x20) PINA7 PINA6 PINA5 PINA4 PINA3 PINA2 PINA1 PINA0 PINA Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value N/A N/A N/A N/A N/A N/A N/A N/A 14.3.9 PORTB – Port B Data Register Bit 7 6 5 4 3 2 1 0 0x05 (0x25) PORTB7
in „Hilfe bei AD-Wandler!“ · Mikrocontroller und Digitale Elektronik ·
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PDF
mega644.pdf
0 0x00 (0x20) PINA7 PINA6 PINA5 PINA4 PINA3 PINA2 PINA1 PINA0 PINA Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value N/A N/A N/A N/A N/A N/A N/A N/A 11.3.9 PORTB – Port B Data Register Bit 7 6 5 4 3 2 1 0 0x05 (0x25) PORTB7
in „AVR Controller braucht zu viel Strom“ · Mikrocontroller und Digitale Elektronik ·
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Datei
Lang_EN.txt
frmBestellAenderung.chkAendFracht=Cargo frmBestellAenderung.chkAendBemerkung=Note frmMain.edDemoHint=8486\r\n0x2126 frmMain.edDemo1Hint=182\r\n0xB6 frmMain.edDemo2Hint=8804\r\n0x2264 frmMain.edDemo3Hint=8805\r\n0x2265 frmMain.edDemo4Hint=177\r\n0xB1 frmMain.edDemo5Hint=8776\r\n0x2248 frmMain.edDemo6Hint=216\
in „Elela - BOM import, Component verlinkt nicht zuvorhandenen Bauteilen“ · Projekte & Code ·
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Datei
Lang_DE.txt
Strings.105=.mp3.wmv.m4a frmMain.chkDebErwIns=MultiInsert frmMain.rbMP3Musik=Musik frmMain.spHist1BugN=N frmMain.spHist1Nicht=N frmMain.spHist2BugN=N frmMain.spHist2Nicht=N frmMain.spHistBugN=N frmMain.spHistNicht=N frmMain.spPGKPNichtB=N frmMain.spPGPosNicht=N frmMain.spPKPNichtB=N frmMain.spPPosNicht
in „EleLa - Elektronik Lagerverwaltung V3.1“ · Projekte & Code ·
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PDF
ATmegaXX4.pdf
0 0x00 (0x20) PINA7 PINA6 PINA5 PINA4 PINA3 PINA2 PINA1 PINA0 PINA Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value N/A N/A N/A N/A N/A N/A N/A N/A 13.3.9 PORTB – Port B Data Register Bit 7 6 5 4 3 2 1 0 0x05 (0x25) PORTB7
in „Atmega644PA Timer3“ · Mikrocontroller und Digitale Elektronik ·
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PDF
stc12c5a60s2-english.pdf
LQFP48 LQFP/ STC12LE5A40PWM 3.6~2.1 40K 1280 4 1 2 2 N Y 21K Y Y 7 PDIP PLCC LQFP48 LQFP/ STC12LE5A48PWM 3.6~2.1 48K 1280 4 1 2 2 N Y 13K Y Y 7 PDIP PLCC LQFP48 LQFP/ STC12LE5A52PWM 3.6~2.1 52K 1280 4 1 2 2 N Y 9K Y Y 7 PDIP PLCC LQFP48 LQFP/ STC12LE5A56PWM 3.6~2.1 56K 1280 4 1 2 2 N Y 5K Y Y 7 PDIP PLCC LQFP48 LQFP/ STC12LE5A60PWM 3.6~2.1 60K 1280 4 1 2 2 N Y 1K Y Y 7 PDIP PLCC LQFP48 LQFP/ IAP12LE5A62PWM 3.6~2.1 62K 1280 4 1 2 2 N Y IAP Y Y 7 PDIP PLCC LQFP48
in „STC12C5A60S2 (a.k.a 80C51) programieren mit mySmartUSB light“ · Mikrocontroller und Digitale Elektronik ·
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PDF
STC12C5A60S2-english.pdf
LQFP48 LQFP/ STC12LE5A40PWM 3.6~2.1 40K 1280 4 1 2 2 N Y 21K Y Y 7 PDIP PLCC LQFP48 LQFP/ STC12LE5A48PWM 3.6~2.1 48K 1280 4 1 2 2 N Y 13K Y Y 7 PDIP PLCC LQFP48 LQFP/ STC12LE5A52PWM 3.6~2.1 52K 1280 4 1 2 2 N Y 9K Y Y 7 PDIP PLCC LQFP48 LQFP/ STC12LE5A56PWM 3.6~2.1 56K 1280 4 1 2 2 N Y 5K Y Y 7 PDIP PLCC LQFP48 LQFP/ STC12LE5A60PWM 3.6~2.1 60K 1280 4 1 2 2 N Y 1K Y Y 7 PDIP PLCC LQFP48 LQFP/ IAP12LE5A62PWM 3.6~2.1 62K 1280 4 1 2 2 N Y IAP Y Y 7 PDIP PLCC LQFP48
in „STC 8051 EEPROM zugriff“ · Mikrocontroller und Digitale Elektronik ·
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PDF
rtl8309sb.pdf
r Queue c Management V Flow L RX+-[4] 10Base-T or 10/100 Control A TX+-[4] 100Base-TX MAC 4 TX/RX N PHYceiver FIFO Q o Flow S Buffer 10Base-T or 10/100 Control , Management RX+-[5] 100Base-TX MAC 5 TX/RX T TX+-[5] PHYceiver FIFO u n i g 10Base-T or Flow RX+-[6] 100Base-TX 10/100 Control TX+-[6] PHYceiver
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PDF
Grundlagen.pdf
h C g i S n s U 6 4 P D o n s e l a t e n o . . 6 R U I F 83 8 3 6 F L T d x l l u . m e i e 6 i 1 l d u a e g a s s e i r l d s a r r d m a e e m p c u i e d t a i d h d w d r n a p s e e h a i e 6 h 6 t 8 l P s g r i d w a h e s w g L s . d P d C i t l d p s S e . r . d 6 a E U I F 84 9 – 6 / / T . d d l n s r e u b s d d i m l n a l n i l r n c k i r f r l r n c r i m o s h t a . m i - l a l a h i 0 6 8 P f o g s d d f l p S . . 6 E U I F 85 6.2 DISK SIDE INTERFACE lay
in „Floppy FDD Diskette an AVR Mikrocontroller ATmega Beispiele Assembler“ · Projekte & Code ·
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PDF
doc8209.pdf
PINB1 PINB0 PINB Read/write R/W R/W R/W R/W R/W R/W R/W R/W Initial value N/A N/A N/A N/A N/A N/A N/A N/A 13.4.5 PORTC – Port C Data Register Bit 7 6 5 4 3 2 1 0 PORTC7 PORTC6 PORTC5 PORTC4 PORTC3 PORTC2 PORTC1 PORTC0 PORTC Read/write R/W R/W R/W R/W R/W R/W R/W R/W Initial
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Datei
clk_wiz_0.xml
</spirit:modelParameter> <spirit:modelParameter spirit:dataType="STRING"> <spirit:name>C_CLKFB_IN_N_PORT</spirit:name> <spirit:value spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_CLKFB_IN_N_PORT" spirit:order="381">clkfb_in_n</spirit:value> </spirit:modelParameter> <spirit:modelParameter
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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Datei
clk_wiz_0.xml
</spirit:modelParameter> <spirit:modelParameter spirit:dataType="STRING"> <spirit:name>C_CLKFB_IN_N_PORT</spirit:name> <spirit:value spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_CLKFB_IN_N_PORT" spirit:order="381">clkfb_in_n</spirit:value> </spirit:modelParameter> <spirit:modelParameter
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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Datei
clk_wiz_0.xml
</spirit:modelParameter> <spirit:modelParameter spirit:dataType="STRING"> <spirit:name>C_CLKFB_IN_N_PORT</spirit:name> <spirit:value spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_CLKFB_IN_N_PORT" spirit:order="381">clkfb_in_n</spirit:value> </spirit:modelParameter> <spirit:modelParameter
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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Datei
clk_wiz_0.xml
</spirit:modelParameter> <spirit:modelParameter spirit:dataType="STRING"> <spirit:name>C_CLKFB_IN_N_PORT</spirit:name> <spirit:value spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_CLKFB_IN_N_PORT" spirit:order="381">clkfb_in_n</spirit:value> </spirit:modelParameter> <spirit:modelParameter
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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PDF
Data_sheet_XBee_XBee-Pro_Series_2.pdf
) Gain Application* Required Cable-loss A24-Y6NF Yagi (6-element) 8.8 dBi Fixed 2 m N/A A24-Y7NF Yagi (7-element) 9.0 dBi Fixed 2 m N/A A24-Y9NF Yagi (9-element) 10.0 dBi Fixed 2 m N/A A24-Y10NF Yagi (10-element) 11.0 dBi Fixed 2 m N/A A24-Y12NF
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PDF
R-IN32M-CL_CC-Link_IE_Field_Intelligent_device_station.pdf
explanation to the text Numeric notation: Binary … xxxx , xxxxB or n’bxxxx (n bits) Decimal … xxxx Hexadecimal … xxxxH or n’hxxxx (n bits) Prefixes representing powers of 2 (address space, memory capacity): 10 K (kilo)… 2 = 1024 M (mega)… 2 = 1024 2 G (giga)… 2 = 1024
in „Wie funktioniert der Interrupt- bzw. Eventaufruf?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
RV-3032-C7_App-Manual-rev1.3.pdf
charger disabled 2. Switchover and CLKOUT settings (C0h) to be stored in EEPROM using procedure of 4.6.3. V BACKUP 100 nF 3 6 2 4 VDD VDD V DD V BACKUP RV-3032-C7 MCU V BACKUP INT INT SDA SDA 1 2 SCL SCL 100 nF EVI CLKOUT 5 Primary Battery VSS VSS 10 k 1 Insert a protection resistor of 100 – 1000 Ω to
in „ATtiny85 + Uhrenquarz mit 10 pF CL: Kondensatoren“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
AN649_-_Programming_Guide_0.8.pdf
property may only be set or read in powerup mode. Default: 0 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 HDL SRC SRC CDN Name ACQ CDN Reserved OG ANA DIGI Reserved INTE RHI RLIN OIN INTE NTE N NTE TEN TEN N N N Default 0x00 0 0 0 0x0 0 0 0 Bit Name Function 15:8 Reserved Always write to
in „DABPi - FM/DAB Empfänger mit Si4688 für Raspberry Pi“ · Projekte & Code ·
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PDF
SI4684_Prog.pdf
property may only be set or read in powerup mode. Default: 0 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 HDL SRC SRC CDN Name ACQ CDN Reserved OG ANA DIGI Reserved INTE RHI RLIN OIN INTE NTE N NTE TEN TEN N N N Default 0x00 0 0 0 0x0 0 0 0 Bit Name Function 15:8 Reserved Always write to
in „Wie UKW & DAB Empfänger selber machen?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MachXO2FamilyDataSheet.pdf
— –0.29 — ns General I/O Pin Parameters (Using Primary Clock with PLL) MachXO2-1200HC-HE — 5.97 — 6.00 — 6.13 ns Clock to Output – PIO OutputMachXO2-2000HC-HE — 5.98 — 6.01 — 6.14 ns tCOPLL Register MachXO2-4000HC-HE — 5.99 — 6.02 — 6.16 ns MachXO2-7000HC-HE — 6.02 — 6.06 — 6.20 ns MachXO2-1200HC-HE
in „Statemachine springt in falsche "states" warum?“ · FPGA, VHDL & Co. ·
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PDF
16F648a_40044F.pdf
S M P F N N S S O O G / M R / / / / / / / K / V/ 1 0 7 6 D D 7 6 5 4 C 3 2 1 0 R R R R V V R R R RB T A A A A 4 3 2/ 1 0/ R R R R R 0 9 8 7 6 5 4 3 2 N N 2 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 RA5/MCLR/VPP 1 21 RA7
in „16f627A schaltet RA5 u RA6 nicht“ · Mikrocontroller und Digitale Elektronik ·
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Datei
report_map.txt
------------------ INFO:Security:54 - 'xc3s500e' is a WebPack part. INFO:LIT:243 - Logical network N23 has no load. INFO:LIT:395 - The above info message is repeated 669 more times for the following (max. 5 shown): N24, N25, N26, N27, N28 To see the details of these info messages, please use the -detail
in „Place and Route partially locked IO bus“ · FPGA, VHDL & Co. ·
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PDF
AVR-ASM-Tutorial_16_05_08_v2.pdf
6 7 8 9 : ; < = > ? 4x @ A B C D E F G H I J K L M N O 5x P Q R S T U V W X Y Z [ \ ] ^ _ 6x ` a b c d e f g h i j k l m n o 7x p q r s t u v w x y z { | } ~ DEL Die ersten beiden Zeilen enthalten die
in „AVR-ASM-Tutorial: PDF 16.5.08“ · www.mikrocontroller.net ·
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PDF
STC12C2052AD-english.pdf
RxD Interrupt(falling edge) used to wake up PD mode........144 6.7.6 Program of PCAInterrupt used to wake up Power Down mode......................147 Chapter 7. Timer/Counter 0/1..................................................151 7.2 Timer/Counter 0n RegisMode of
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Place_Route_Trace_Report.pdf
CTOF_DEL --- 0.164 R24C46A.D0 to R24C46A.F0 can/SLICE_1841 ROUTE 1 0.000 R24C46A.F0 to R24C46A.DI0 can/N_288_i (to can_clk_c) -------- 6.103 (25.6% logic, 74.4% route), 7 logic levels. Clock Skew Details: Source Clock Path pcie/u1_pcs_pipe/pcs_top_0/pcs_inst_0 to wb_tlc/intf/SLICE_4275: Name Fanout Delay
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rej09b0001_r8csm.pdf
Addressing Mode Page No. for PageNo.for Mnemonic Function Instruction Code B / B / /No.ofCycles B ] [ / n 8 A 1 1 1 / [ e 6 e e e / n n : a : a a a / t t n s t s t t t / b b [ b b b b b b U BAND 47 150 BCLR 48 150 BMCnd 49 152 BNAND 50 153 BNOR 21 154 BNOT 52 154 53 155 BNTST BNXOR 54 156 BOR 55 156 BSET
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AVR-ASM-Tutorial_16_05_08_v3.pdf
6 7 8 9 : ; < = > ? 4x @ A B C D E F G H I J K L M N O 5x P Q R S T U V W X Y Z [ \ ] ^ _ 6x ` a b c d e f g h i j k l m n o 7x p q r s t u v w x y z { | } ~ DEL Die ersten beiden Zeilen enthalten die
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