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PDF
ssd1803a.pdf
Output SSD1803A Rev 2.0 P 17/69 May 2011 Solomon Systech 7 FUNCTIONAL BLOCK DESCRIPTIONS 7.1 Busy Flag (BF) When BF = "High", it indicates that the internal operation is being processed. So during this time the next instruction cannot be accepted. BF can be read, when RS = Low and R/W = High (Read Instruction
in „Probleme mit EADOGM204-4 und ATMEGA32“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ssd1803a_2_0.pdf
Output SSD1803A Rev 2.0 P 17/69 May 2011 Solomon Systech 7 FUNCTIONAL BLOCK DESCRIPTIONS 7.1 Busy Flag (BF) When BF = "High", it indicates that the internal operation is being processed. So during this time the next instruction cannot be accepted. BF can be read, when RS = Low and R/W = High (Read Instruction
in „Display DOGM-204A/SSD1803A mit I2C - ROM Auswahl“ · Mikrocontroller und Digitale Elektronik ·
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Datei
debug_error.asm
r1, r1 6a: 1f be out 0x3f, r1 ; 63 6c: cf ef ldi r28, 0xFF ; 255 6e: d4 e0 ldi r29, 0x04 ; 4 70: de bf out 0x3e, r29 ; 62 72: cd bf out 0x3d, r28 ; 61 00000074 <__do_copy_data>: 74: 11 e0 ldi r17, 0x01 ; 1 76: a0 e0 ldi r26, 0x00 ; 0 78: b1 e0 ldi r27, 0x01 ; 1 7a: ec e8 ldi r30, 0x8C ; 140 7c: fc e0
in „Fehler bei einfacher Integer-Division?“ · Mikrocontroller und Digitale Elektronik ·
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Datei
lab9a_c180.txt
lds LFFFF ;$C1B6 $FF $FF $FF lds LFFFF ;$C1B9 $FF $FF $FF lds LFFFF ;$C1BC $FF $FF $FF lds LFFFF ;$C1BF $FF $FF $FF lds LFFFF ;$C1C2 $FF $FF $FF lds LFFFF ;$C1C5 $FF $FF $FF lds LFFFF ;$C1C8 $FF $FF $FF lds LFFFF ;$C1CB $FF $FF $FF lds LFFFF ;$C1CE $FF $FF $FF lds LFFFF ;$C1D1 $FF $FF $FF lds LFFFF ;$C1D4
in „HCS12 CPU Disassembler“ · Mikrocontroller und Digitale Elektronik ·
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PDF
mirkonet_tmp.pdf
A N/A 2,7 4,4 3,3 N/A 1212685 104000LOGICMC14511BD ON SEMI 4000CMOS4511 BCD-DECODER YES NO 0,400 0,480 4,800 Farnell SOIC-16 N/A BCD to 7-Segment Decoder with Latch N/A -55/+125 N/A N/A 3 15 3,3 / 5 / 9 /N5/A/ 1 702330 9 VREG TS2937CM-5.0 TAIWAN SEMI VREG LDO 5,0V 0,5A YES YES 0,527 0,632 5,692 Farnell
in „Komplettverkauf Bauteile, was wert? - Tabelle“ · Markt ·
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PDF
D15G14E_14_030526.pdf
HEX 0 0 0 1 1 0 0 1 1 33 1 TF7 TF6 TF5 TF4 TF3 TF2 TF1 TF0 XX 1 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 XX 1 BF7 BF6 BF5 BF4 BF3 BF2 BF1 BF0 XX Center Bottom Top Whole Fixed area Scrolling area Fig. 1 Display Scroll Mode Note: The top fixed area changes according to B4 bit of the memory access control command. * Default values after reset are as follows. TF7 to TF0: 0 SA7 to SA0: 0 BF7 to BF0: 53H 48 EPSON Rev.1.4 S1D15G14 Series (25) TEST mode This___mmand is for testing IC chips. D/C D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 0 0 1 1 0 1 0 0 34 (26) TEST mode This command is for testing IC chips
in „Nokia LCD 3510“ · Mikrocontroller und Digitale Elektronik ·
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PDF
6300_RM-217_RM-222_schematics.pdf
S2416 B3 GND GND D3 D4 9 V2401-2 Keyboard LEDs D6 10 1.8V GND GND L2402 V2405 V2406 CSX 11 VIO CL-480S-WHS-D-TS 5 RESX 12 PEMT1 CL-480S-WHS-D-TS EMI filter TE 13 600R/100MHz V2401-1 R2418 ROW5 GND GND D7 14 470R L 2 1 0 Z2402 C2416 C2415 J2418 C O O O EMIF07-LCD02F3 D5 15 100n GND 27p GND R2408 C C C GND 16 22k V2409 V2407 3 B3 GND GND D3 D3 17 L2404 2.8V CL-480S-WHS-D-TS CL-480S-WHS-D-TS A3 GND GND C3 D1 18 R2419 2 VAUX 470R 21 DCX 19 600R/100MHz C2418 7 D4 Out7 In7 D1 RDX 20 C2417 27p V2402-2 J2419 1 5 D5 Out6 In6 D2 GND 21 100n EMH25T2R GND 3 C4 Out5 In5
in „Nokia 6300 Display“ · Mikrocontroller und Digitale Elektronik ·
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Datei
hardinfo_report.html
-b41f </tt></td><td class="value">AHCI SATA low-level driver</td></tr> <tr><td class="field"><tt> b480-b483 </tt></td><td class="value">Intel Corporation 82801IBM/IEM (ICH9M/ICH9M-E) 4 port SATA Controller [AHCI mode] (rev 03) (prog-if 01 [AHCI 1.0])</td></tr> <tr><td class="field"><tt> b480-b483 </tt
in „Notebook vom Typ Asus UL50VT erkennt weder Festplatte noch DVD-Laufwerk“ · PC Hard- und Software ·
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Datei
temp_senden.asm
reset_pulse: sbi ddrc, 0 ;pc0 als ausgang cbi portc, 0 rcall wait500us ;mcu hält bus für mindestens 480us low cbi ddrc, 0 ;lässt den bus los, geht in rx-mode rcall wait70us ;wartet 70 us wait_presence_pulse: sbic pinc, 0 rjmp wait_presence_pulse ;wartet auf presence pulse wait_presence_pulse_end: sbis
in „DS1820/DS18S20“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AN1010.pdf
the MCU to start execution of its bootloader program, located in internal ROM, between addresses $BF40 and $BFFF. In normal single-chip or expanded modes, the boot ROM is not accessible, and reads from these memory locations will result, respectively, in irrelevant data or external memory fetches. An
in „Programm zum MC68HC11 auslesen und programmieren“ · Mikrocontroller und Digitale Elektronik ·
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Datei
SET-65_hexdump.txt
FB 05 FB 85 F0E0: FB 95 E1 4C BC F0 D0 09 E8 E0 0A 90 CC A2 01 D0 F0F0: C8 C9 13 D0 09 CA E0 01 10 BF A2 09 D0 BB 60 85 F100: FE A0 08 A9 C8 46 FE B0 14 A9 60 2C D5 7F 10 FB F110: 8D F4 7F AD 82 7F 49 10 8D 82 7F A9 60 2C D5 7F F120: 10 FB 8D F4 7F AD 82 7F 49 10 8D 82 7F 88 D0 D3 F130: 60 18 65 EC 85
in „CT SET 65 Einplatinencomputer“ · Mikrocontroller und Digitale Elektronik ·
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Datei
set-and-map.c
0xBA, _BitInt(0xBB): 0xBB, _BitInt(0xBC): 0xBC, \ _BitInt(0xBD): 0xBD, _BitInt(0xBE): 0xBE, _BitInt(0xBF): 0xBF, _BitInt(0xC0): 0xC0, \ \ _BitInt(0xC1): 0xC1, _BitInt(0xC2): 0xC2, _BitInt(0xC3): 0xC3, _BitInt(0xC4): 0xC4, \ _BitInt(0xC5): 0xC5, _BitInt(0xC6): 0xC6, _BitInt(0xC7): 0xC7, _BitInt(0xC8): 0xC8
in „Diverse fragen zu Hash Maps in C“ · Softwareentwicklung ·
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Datei
set-and-map.c
0xBA, _BitInt(0xBB): 0xBB, _BitInt(0xBC): 0xBC, \ _BitInt(0xBD): 0xBD, _BitInt(0xBE): 0xBE, _BitInt(0xBF): 0xBF, _BitInt(0xC0): 0xC0, \ \ _BitInt(0xC1): 0xC1, _BitInt(0xC2): 0xC2, _BitInt(0xC3): 0xC3, _BitInt(0xC4): 0xC4, \ _BitInt(0xC5): 0xC5, _BitInt(0xC6): 0xC6, _BitInt(0xC7): 0xC7, _BitInt(0xC8): 0xC8
in „Diverse fragen zu Hash Maps in C“ · Softwareentwicklung ·
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PDF
lg_flatron_l1800p_lb886f_ch_cl-29.pdf
31.468 900 720 18 108 54 720x400 2 28.321 V + 70.8 449 400 12 2 35 70Hz H – 31.469 840 640 16 96 48 640x480 3 25.175 V – 59.94 525 480 10 2 33 60Hz H – 37.5 840 640 16 64 120 640x480 4 31.5 V – 75 500 480 1 3 16 75Hz H – 43.269 832 640 56 56 80 5 36.0 640x480 V – 85.0 509 480 1 3 25 85Hz H + 37.879 1056 800
in „Überspannung in Mehrparteien-Wohunung. Baustrom, oder Kabel angebohrt?“ · Haus & Smart Home ·
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Datei
TEST.asm
reset_pulse: sbi ddrb, 1 ;pd0 als ausgang cbi portb, 1 rcall wait500us ;mcu hält bus für mindestens 480us low cbi ddrb, 1 ;lässt den bus los, geht in rx-mode rcall wait70us ;wartet 70 us wait_presence_pulse: sbic pinb, 1 rjmp wait_presence_pulse ;wartet auf presence pulse wait_presence_pulse_end: sbis
in „Vorzeichen Ausgeben“ · Mikrocontroller und Digitale Elektronik ·
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Artikel
AVR Bootloader in C - eine einfache Anleitung
0x35 ; 53 MCUCR = temp | (1<<IVCE); 1872: 98 2f mov r25, r24 1874: 91 60 ori r25, 0x01 ; 1 1876: 95 bf out 0x35, r25 ; 53 MCUCR = temp | (1 Wir erkennen, dass die Sektion .text ab der Adresse (VMA) 0x1800 beginnt. Weiter sehen wir im Disassembly der Sektion .text, dass unser Programm mit der Interrupt-Einsprungstabelle
10009000B7CFEF92FF920F931F93CF93DF9383E33A 1000A00090E07BD0789484E390E0D0D088ECE82E88 1000B000F12C00E018E18BD0EC0190FDFCCF8236F2 1000C00069F480E091E0B6D080E197E2F7013197E2 1000D000F1F70197D9F7F8010995EDCF8CE191E09F 1000E000A9D08C2F91D081E491E0A4D0E4CF1F92CD 1000F0000F920FB60F9211242F938F939F93EF932C 10010000FF939091C0002091C600E0918601EF5FBF
Artikel ·
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PDF
Vergleichsliste.pdf
2SD1238 2SC2837 MN8303 ECG37 2SA1106 2SB992 2SA1263 2SA1264 2SA1265N ECG38 2N6212 2N6213 ECG39 MJE350 BF472 ECG40 2SC2259 ECG41 2SA979 ECG42 2SC1583 ECG43 2SA798 ECG44 2SC2297 2SC2291 ECG45 2SA995 ECG46 MPSA13 MPSA14 ECG47 MPSA18 BFS29 ECG48 2N6725 MPSA12 ECG49 D40E7 ECG50 D41E7 ECG51 2SC2929 2SC3038 MJ13005
in „ECG45 was ist das?“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
PIC16F1939.pdf
float. CON2 register. Interrupt is generated once the Stop/Restart condition is complete. 24.6.6.1 BF Status Flag In Transmit mode, the BF bit of the SSPSTAT register is set when the CPU writes to SSPBUF and is cleared when all eight bits are shifted out. 24.6.6.2 WCOL Status Flag If the user writes
in „MPLAB delay und xtalfreq richtig benutzen“ · Mikrocontroller und Digitale Elektronik ·
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Artikel
ARM-ASM-Tutorial
of section .text: 80000ec 0f481049 104a03e0 52f8043b 40f8043b .H.I.J..R..;@..; 80000fc 8842f9d3 0d480e49 4ff00002 01e040f8 .B...H.IO.....@. 800010c 042b8842 fbd300f0 47f800f0 4bf84ff4 .+.B....G...K.O. 800011c 80710848 01600848 00f058f8 30bffde7 .q.H.`.H..X.0... 800012c 00040020 04040020 f0010008 04040020
pc, #68] ; (80001c0 ) 800017c: 7001 strb r1, [r0, #0] 800017e: f011 0101 ands.w r1, r1, #1 8000182: bf0c ite eq 8000184: f44f 7180 moveq.w r1, #256 ; 0x100 8000188: f04f 7180 movne.w r1, #16777216 ; 0x1000000 800018c: 480f ldr r0, [pc, #60] ; (80001cc ) 800018e: 6001 str r1, [r0, #0] 8000190: 4770 bx
Artikel ·
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PDF
PIC18Fxx2.pdf
(high) byte of Address (bits SSPIF before the transfer was received. and BF are set). In this case, the SSPSR register value is not loaded into the SSPBUF, but bit SSPIF (PIR1<3>) is set. The 9. Read the SSPBUF register (clears bit BF) and clear flag bit SSPIF. BF bit is cleared
in „AD1 und AD2 Multiplexen (PIC18F452)“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Diamond_WP.pdf
popular VGA and standard definition (SD, also known as D1) video codecs with resolutions up to 720x480 (NTSC) and 720x576 (PAL) including H.264 Main Profile, VC-1 Main Profile, MPEG-4 Advanced Simple Profile (ASP), and MPEG-2 Main Profile, each of which is available from Tensilica. Lower resolutions
in „Nachfolger vom esp8266: ESP32 - besser, schneller“ · Offtopic ·
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PDF
tle2426-q1.pdf
86 DC 0 RFB 5 2 1K RIN1 3 1 220K RIN2 1 4 220K .MODEL DX D(IS=800.OE−18) .MODEL QX PNP(IS=800.OE−18BF=480) .ENDS POST OFFICE BOX•DALLAS, TEXAS 75265 11 PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball
in „Möglichst genaue Spannungshalbierung mit OP?“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
D865GBF_D865GLC_TechProdSpec.pdf
motherboards/desktop Available configurations for the Desktophttp://developer.intel.com/design/motherbd/bf/bf_available.htm Board D865GBF Available configurations for the Desktophttp://developer.intel.com/design/motherbd/lc/lc_available.htm Board D865GLC Processor data sheets http://www.intel.com/design/litcentr
in „VS: Intel D865GBF, Pentium 4 (3GHz/1M/800) SL7PM, Matrox G45“ · Markt ·
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PDF
CY7C68013.pdf
level 20–33 pF (5% tolerance) load capacitors. An on-chip PLL multiplies the 24-MHz oscillator up to 480 MHz, as required by the transceiver/PHY, and internal counters divide it down for use as the 8051 clock. The default 8051 clock frequency is 12 MHz. The clock frequency of the 8051 can be changed by
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PDF
CY7C68013.pdf
level 20–33 pF (5% tolerance) load capacitors. An on-chip PLL multiplies the 24-MHz oscillator up to 480 MHz, as required by the transceiver/PHY, and internal counters divide it down for use as the 8051 clock. The default 8051 clock frequency is 12 MHz. The clock frequency of the 8051 can be changed by
in „Stereokamera CY7C68013A + 2 mal MT9D131“ · Mikrocontroller und Digitale Elektronik ·
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PDF
TestArmTurtorialDeu.pdf
Abschnitts .text: 80000ec 0f481049 104a03e0 52f8043b 40f8043b .H.I.J..R ..; @ ..; 80000fc 8842f9d3 0d480e49 4ff00002 01e040f8 .B ... H.IO ..... @. 800010c 042b8842 fbd300f0 47f800f0 4bf84ff4. +. B .... G ... K.O. 800011c 80710848 01600848 00f058f8 30bffde7 .q.H.`.H..X.0 ... 800012c 00040020 04040020 f0010008
in „ARM-Assembler-Tutorial“ · Mikrocontroller und Digitale Elektronik ·
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PDF
pic16f88.pdf
will cause the SSPIF, BF and UA are set). SSP module not to give this ACK pulse: 5. Update the SSPADD register with the first (high) byte of address; if match releases SCL line, this a) The Buffer Full bit, BF (SSPSTAT<0>),
in „auftrennen einer 2stelligen Dezimalzahl in asm (pic 16f88)“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Datenblatt_PIC12F1822.pdf
SSP1IF and UA are still set so that the slave soft- ware can set SSP1ADD back to the high address. BF is not set because there is no match. CKP is unaffected. 10. Slave clears SSP1IF. 11. Slave reads the received matching address from SSP1BUF clearing BF. 12. Slave loads high address into SSP1ADD. 13
in „PIC12F1822-PWM Mode“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Datenblatt_PIC12F1822.pdf
SSP1IF and UA are still set so that the slave soft- ware can set SSP1ADD back to the high address. BF is not set because there is no match. CKP is unaffected. 10. Slave clears SSP1IF. 11. Slave reads the received matching address from SSP1BUF clearing BF. 12. Slave loads high address into SSP1ADD. 13
in „Interrupt-PIC12F1822“ · Mikrocontroller und Digitale Elektronik ·
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PDF
12F1822_1823.pdf
SSP1IF and UA are still set so that the slave soft- ware can set SSP1ADD back to the high address. BF is not set because there is no match. CKP is unaffected. 10. Slave clears SSP1IF. 11. Slave reads the received matching address from SSP1BUF clearing BF. 12. Slave loads high address into SSP1ADD. 13
in „Auflösung PWM-Mode“ · Mikrocontroller und Digitale Elektronik ·
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PDF
12F1822_1823.pdf
SSP1IF and UA are still set so that the slave soft- ware can set SSP1ADD back to the high address. BF is not set because there is no match. CKP is unaffected. 10. Slave clears SSP1IF. 11. Slave reads the received matching address from SSP1BUF clearing BF. 12. Slave loads high address into SSP1ADD. 13
in „8Bits und 2Bits in eine Integer-Variable“ · Mikrocontroller und Digitale Elektronik ·
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PDF
12F1822_1823.pdf
SSP1IF and UA are still set so that the slave soft- ware can set SSP1ADD back to the high address. BF is not set because there is no match. CKP is unaffected. 10. Slave clears SSP1IF. 11. Slave reads the received matching address from SSP1BUF clearing BF. 12. Slave loads high address into SSP1ADD. 13
in „Timer2 auf 10bit einstellen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PIC12FLF1822PIC16FLF1823.pdf
SSP1IF and UA are still set so that the slave soft- ware can set SSP1ADD back to the high address. BF is not set because there is no match. CKP is unaffected. 10. Slave clears SSP1IF. 11. Slave reads the received matching address from SSP1BUF clearing BF. 12. Slave loads high address into SSP1ADD. 13
in „PIC16lf1823 General purpose I/Os mit Schmitt Trigger ?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
pic18f2320.pdf
. set before the transfer was received. 8. Receive first (high) byte of address (bits SSPIF and BF are set). In this case, the SSPSR register value is not loaded into the SSPBUF but bit SSPIF (PIR1<3>) is set. The 9. Read the SSPBUF register (clears bit BF) and BF bit is cleared by reading the SSPBUF
in „I2C-Bus Collision“ · Mikrocontroller und Digitale Elektronik ·
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PDF
40001722A.pdf
Sequence Enable, ACKEN bit of the SSPCON2 register. 9. After the eighth falling edge of SCL, SSPIF and BF are set. 23.6.7.1 BF Status Flag 10. Master clears SSPIF and reads the received byte from SSPUF, clears BF. In receive operation, the BF bit is set when an address or data byte is loaded into SSPBUF
in „PIC16(L)F1703 low voltage Programmierung?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
4620.pdf
was set before the transfer was received. 8. Receive first (high) byte of address (bits SSPIF and BF are set). In this case, the SSPSR register value is not loaded into the SSPBUF, but bit SSPIF (PIR1<3>) is set. The 9. Read the SSPBUF register (clears bit BF) and BF bit is cleared by reading the SSPBUF
in „SPI master/slave - schreib/lese befehle ?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PIC16F1503.pdf
SSPxIF and UA are still set so that the slave soft- ware can set SSPxADD back to the high address. BF is not set because there is no match. CKP is unaffected. 10. Slave clears SSPxIF. 11. Slave reads the received matching address from SSPxBUF clearing BF. 12. Slave loads high address into SSPxADD. 13
in „Versorgungsspannung vom PIC mit PIC messen“ · Mikrocontroller und Digitale Elektronik ·
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Datei
nibble_data.vhd
x"0BD" => data <=memory(15)(11 downto 8); when x"0BE" => data <=memory(15)(15 downto 12); when x"0BF" => data <=memory(15)(3 downto 0); when x"0C0" => data <=memory(15)(7 downto 4); --ende 2. Reihe when x"0C1" => data <=memory(16)(19 downto 16); when x"0C2" => data <=memory(16)(23 downto 20); when x
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PDF
Mikrocontroller-PIC18F2420.pdf
. set before the transfer was received. 8. Receive first (high) byte of address (bits, SSPIF and BF, are set). In this case, the SSPSR register value is not loaded into the SSPBUF, but bit, SSPIF (PIR1<3>), is set. The 9. Read the SSPBUF register (clears BF bit) and BF bit is cleared by reading the
in „Spannungseinbruch beim Sampeln des Signals“ · Mikrocontroller und Digitale Elektronik ·
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Datei
output.txt
Invalid opcode at 0x01de (478). Disassembler skipped two bytes. .word 0x0018 ; Invalid opcode at 0x01e0 (480). Disassembler skipped two bytes. 1e2: nop 1e4: nop 1e6: nop .word 0x0044 ; Invalid opcode at 0x01e8 (488). Disassembler skipped two bytes. .word 0x0041 ; Invalid opcode at 0x01ea (490). Disassembler
in „Atmega8 löst Timerinterrupt nicht aus“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PIC18f6622.pdf
. set before the transfer was received. 8. Receive first (high) byte of address (bits SSPxIF and BF are set). In this case, the SSPxSR register value is not loaded into the SSPxBUF, but bit SSPxIF is set. The BF bit is 9. Read the SSPxBUF register (clears bit BF) and cleared by reading the SSPxBUF
in „PIC 18F6622 Zeit um EEPROM zu schreiben“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PIC_18F8722_Data_Sheet.pdf
pulse: line, this will clear bit UA. • The Buffer Full bit, BF (SSPxSTAT<0>), was set 6. Read the SSPxBUF register (clears bit BF) and before the transfer was received. clear flag bit SSPxIF. • The overflow bit, SSPOV (SSPxCON1<6>), was set before the transfer was
in „PIC 18F6527 mit 32MHz Takten“ · Mikrocontroller und Digitale Elektronik ·
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PDF
VHF-COMM.1984.3.pdf
Designation Component 11 060 1 - 0 6 11 LED L0 350·4 5 0 612 - 0 616 Oiode l N4148 2 T 601,T 602 FET BF 256 5 T 603 - T 607 FET BF245 C 10 T608 - T 617 Transistor BC 237 B 1 1601 NE 556N 1602 HEF 40192 BP 1 1 1603 HEF 4028 BP 1 1604 HEF 4001 BP 2 1605, 1606 HEF 4030 BP 2 1607, 1608 CO 4066 BE 1 1609 TL
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PDF
VHF-COMM.1984.3.pdf
Designation Component 11 060 1 - 0 6 11 LED L0 350·4 5 0 612 - 0 616 Oiode l N4148 2 T 601,T 602 FET BF 256 5 T 603 - T 607 FET BF245 C 10 T608 - T 617 Transistor BC 237 B 1 1601 NE 556N 1602 HEF 40192 BP 1 1 1603 HEF 4028 BP 1 1604 HEF 4001 BP 2 1605, 1606 HEF 4030 BP 2 1607, 1608 CO 4066 BE 1 1609 TL
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Datei
Castillo33.c
0x5955, 0x0ABF, 0xB1FC, 0x0255, 0x45A2, 0x8002, 0x0235, 0xFFD6, 0x455B, 0x1551, 0x8585, 0xD616, 0x56BF, 0xF595, 0x80E3, 0x956C, 0x2595, 0xA256, 0x5635, 0x25A4, 0xA956, 0x5565, 0x55A4, 0x5655, 0x5A25, 0x6555, 0x27FD, 0xCFF0, 0x0956, 0xD600, 0x5808, 0x6024, 0xBFFD, 0x1455, 0x5915, 0xBF58, 0x8859, 0x6156
in „BMP/JPEG/GIF/PNG nach C-Code konvertieren“ · Projekte & Code ·
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Datei
Castillo33.c
0x5955, 0x0ABF, 0xB1FC, 0x0255, 0x45A2, 0x8002, 0x0235, 0xFFD6, 0x455B, 0x1551, 0x8585, 0xD616, 0x56BF, 0xF595, 0x80E3, 0x956C, 0x2595, 0xA256, 0x5635, 0x25A4, 0xA956, 0x5565, 0x55A4, 0x5655, 0x5A25, 0x6555, 0x27FD, 0xCFF0, 0x0956, 0xD600, 0x5808, 0x6024, 0xBFFD, 0x1455, 0x5915, 0xBF58, 0x8859, 0x6156
in „Bilder umwandeln für C/C++ Code“ · Softwareentwicklung ·
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PDF
esp32-c3_technical_reference_manual_en.pdf
Version 1.1) Submit Documentation Feedback 2 GDMA Controller (GDMA) GoBack Register 2.20. GDMA_IN_DSCR_BF0_CHn_REG (n: 0-2) (0x0094+192*n) C0 B0 CR _DS IK _IL DA G 31 0 0 Reset GDMA_INLINK_DSCR_BF0_CHn Represents the address of the current receive descriptor x that is pre-read. (RO) Register 2.21. GDMA_IN_DSCR_BF1
in „Mit dem ESP32C3 laufen lernen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
esp32-c3_technical_reference_manual_en.pdf
Version 1.1) Submit Documentation Feedback 2 GDMA Controller (GDMA) GoBack Register 2.20. GDMA_IN_DSCR_BF0_CHn_REG (n: 0-2) (0x0094+192*n) C0 B0 CR _DS IK _IL DA G 31 0 0 Reset GDMA_INLINK_DSCR_BF0_CHn Represents the address of the current receive descriptor x that is pre-read. (RO) Register 2.21. GDMA_IN_DSCR_BF1
in „ESP32C3 > PLL“ · Mikrocontroller und Digitale Elektronik ·
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Datei
debug_okay.asm
r1, r1 6a: 1f be out 0x3f, r1 ; 63 6c: cf ef ldi r28, 0xFF ; 255 6e: d4 e0 ldi r29, 0x04 ; 4 70: de bf out 0x3e, r29 ; 62 72: cd bf out 0x3d, r28 ; 61 00000074 <__do_copy_data>: 74: 11 e0 ldi r17, 0x01 ; 1 76: a0 e0 ldi r26, 0x00 ; 0 78: b1 e0 ldi r27, 0x01 ; 1 7a: e6 ee ldi r30, 0xE6 ; 230 7c: fb e0
in „Fehler bei einfacher Integer-Division?“ · Mikrocontroller und Digitale Elektronik ·
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Datei
disas.txt
16 89 ldd r17, Z+22 ; 0x16 bea: 16 17 cp r17, r22 bec: 51 f4 brne .+20 ; 0xc02 bee: 46 95 lsr r20 bf0: 21 e0 ldi r18, 0x01 ; 1 bf2: 30 e0 ldi r19, 0x00 ; 0 bf4: e6 2f mov r30, r22 bf6: ee 0f add r30, r30 bf8: e6 0f add r30, r22 bfa: ff 27 eor r31, r31 bfc: e0 50 subi r30, 0x00 ; 0 bfe: f6 4e sbci r31
in „Audio Spektrum Analyzer mit ATtiny85“ · Projekte & Code ·