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ESP_Tubes.pdf
numerous phase splitter designs, and each has its place in the world. Some are much better than others, but the ideal circuit depends on many different things. The biggest influence is the type of output valve used - some need far more signal on the control grid than others, and even the bias point
in „EL34 Kathodenwiderstand nachrüsten“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
TC1602E-01.pdf
Driver Circuit Total of 16 commons and 40 segments signal drivers are valid in the LCD driver circuit. When a program specifies the character fonts and line numbers, the corresponding common signals output drive-waveforms and the others still output unselected waveforms. The relationships between Display
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PDF
SatDumpdoc.pdf
to set the rotator to when IDLE "el": 90.0 // Elevation to set the rotator to when IDLE }, "unpark_at_minus": 60.0, // How manys seconds before a pass the rotator should un-park at prior to a pass // Other general parameters
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Datei
atari_tb.vhd
Refreshausgang, um eigene Zugriffe auf den Bus zu ermöglichen (über BC847 Transistor) begin tb_adr <= ( others => '0'); tb_data <= ( others => 'Z'); tb_ram_rom_adr <= ( others => 'Z'); tb_rdy <= '0'; tb_rw <= '1'; tb_switch_in <= '0'; tb_phi2 <= not tb_phi2 after tb_phi2_period / 2 when simulation_run; tb_phi2short
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PDF
evb2240user.pdf
semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order
in „Schaltplan USB2241“ · Mikrocontroller und Digitale Elektronik ·
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PDF
battery_mm_3474_e.pdf
SEL1 Any products mentioned in this catalog are subject to any modification in their appearance and others for improvements without prior notification. The details listed here are not a guarantee of the individual products at the time of ordering. When using the products, you will be asked to check their
in „Defekte BMS-Platine Rasenmäher-Roboter - Ursachenforschung“ · Platinen ·
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Datei
narretei.vhd
std_logic_vector(3 downto 0); begin all_inputs <= a & b & c & d; with all_inputs select y <= '1' when "0000", '1' when "0001", '1' when "0011", '1' when "0010", -- '1' when "0100", '1' when "0101", '1' when "0111", '1' when "0110", -- '1' when "1100", '1' when "1101", '1' when "1111", '1' when "1110", -- '1' when "1000", '1' when "1001", '1' when "1011", '1' when "1010", 'X' when others; end verhalten;
in „VHDL Anfänger braucht Hilfe bei der Überprüfung IF-THEN-ELSE“ · FPGA, VHDL & Co. ·
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Datei
FIRFilter.vhd
- 1) of std_logic_vector(2 * DSIZE - 1 downto 0); -- 48 Bit Akkumulator signal a_sop : ASOP := ( others => x"000000000000" ); type ACOEF is array (0 to NBTAP - 1) of std_logic_vector(0 to COESIZE - 1); signal a_coeff : ACOEF := ( others => x"0000" ); begin process begin wait until rising_edge(clk_100
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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Datei
split_digits.vhd
end split_digits; architecture rtl of split_digits is signal s_counter : unsigned(9 downto 0) := (others => '0'); signal s_digits : std_logic_vector(11 downto 0) := (others => '0'); begin o_busy <= '1' when i_start = '1' or s_counter > 0 else '0'; o_digits <= s_digits; process begin wait until rising_edge
in „VHDL - Division von Integern zu Float“ · FPGA, VHDL & Co. ·
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Datei
Umsetzer.txt
sx <= s & x; with sx select -- Ab hier Umwandlung von Aiken in 3 Excess-Code (s = 0) ez <= "00011" when "00000", "00100" when "00001", "00101" when "00010", "00110" when "00011", "00111" when "00100", "01000" when "01011", "01001" when "01100", "01010" when "01101", "01011" when "01110", "01100" when
in „Error: Top-level design entity "Umsetzer" is undefined“ · FPGA, VHDL & Co. ·
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Datei
ADC_SPI.vhd
length_bits, all bits have been transmitted signal TX_REG : std_logic_vector(length_bits-1 downto 0) := (others=>'0'); signal RX_REG : std_logic_vector(length_bits-1 downto 0) := (others=>'0'); signal RX_REG_VALID : std_logic_vector(length_bits-5 downto 0) := (others=>'0'); signal TX_ENABLE, RX_ENABLE : std_logic
in „Hilfe bei VHDL-Modul für ADC128S022 im DE0-Nano Board“ · FPGA, VHDL & Co. ·
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Datei
ADC_SPI.vhd
length_bits, all bits have been transmitted signal TX_REG : std_logic_vector(length_bits-1 downto 0) := (others=>'0'); signal RX_REG : std_logic_vector(length_bits-1 downto 0) := (others=>'0'); signal RX_REG_VALID : std_logic_vector(length_bits-5 downto 0) := (others=>'0'); signal TX_ENABLE, RX_ENABLE : std_logic
in „Hilfe bei VHDL-Modul für ADC128S022 im DE0-Nano Board“ · FPGA, VHDL & Co. ·
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PDF
SAMSUNG_ICR18650_26F.pdf
. 8. Others 8.1 Disassembly 10 -SAMSUNG SDI Confidential Proprietary – Spec. No. ICR18650-26F Version No. 0.0 8.1.1 The cell should not be dismantled from the battery pack. 8.1.2 Internal short-circuit caused by disassembly may lead to heat generation and/or venting. 8.1.3 When the electrolyte is coming in contact with the skin or eyes, flush immediately with fresh water and seek medical advice. 8.2 Short-circuiting 8.2.1 Short-circuit results in very high current which leads
in „LiPo / LiIon Zellen“ · Analoge Elektronik und Schaltungstechnik ·
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Datei
multiplikation_1adder.vhd
constant intBITWIDTH: integer:= 2*iBITWIDTH; signal SUM: std_logic_vector(intBITWIDTH-1 downto 0):=(others => '0'); signal f1_sx_shift, f2_sx_shift: std_logic_vector(intBITWIDTH-1 downto 0):=(others => '0'); begin busy <= '1' when start = '1' or unsigned(f1_sx_shift) > 0 or unsigned(f2_sx_shift) > 0 else
in „Ressourcen optimieren für signed multiplier“ · FPGA, VHDL & Co. ·
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Datei
multiplikation_1adder.vhd
constant counter_max: integer:= oBITWIDTH; signal SUM: std_logic_vector(intBITWIDTH-1 downto 0):=(others => '0'); signal f1_sx_shift, f2_sx_shift: std_logic_vector(intBITWIDTH-1 downto 0):=(others => '0'); signal counter: integer range 0 to counter_max:=counter_max; begin busy <= '1' when counter < counter_max
in „Ressourcen optimieren für signed multiplier“ · FPGA, VHDL & Co. ·
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Datei
runangle.vhd
; ceSubw <= '1'; -- Start für sub/add FXa -/+ sAZAT3 usw stateangle <= 63; next_stateangle <= 11; WHEN 11 => -- ausführen sub/add FXa -/+ sAZAT3.. = FYw,FZw fertig ceSubw <= '0';-- reset stateangle <= 12; WHEN 12 =>-- für test stateangle <= 13; WHEN 13 => -- zwischen state notwendig *** IF grPI2 = '1
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PDF
doc8003.pdf
another criteria for a successful enhancement of the resolution is that the input signal has to vary when sampled. This may look like a contradiction, but in this case variation means just a few LSB. The variation should be seen as the noise-component of the signal. When oversampling a signal, there should
in „ADC-Wert nicht linear beim Einlesen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
oversampling.pdf
another criteria for a successful enhancement of the resolution is that the input signal has to vary when sampled. This may look like a contradiction, but in this case variation means just a few LSB. The variation should be seen as the noise-component of the signal. When oversampling a signal, there should
in „Bias-Voltage für ADC“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ADC-Oversampling-AVR121.pdf
another criteria for a successful enhancement of the resolution is that the input signal has to vary when sampled. This may look like a contradiction, but in this case variation means just a few LSB. The variation should be seen as the noise-component of the signal. When oversampling a signal, there should
in „Verständnissfrage zur nötigen Mehrfachmessung eines AD-Messwertes mit µC“ · Mikrocontroller und Digitale Elektronik ·
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Datei
BCDDecoder.vhd
<= "1001100"; -- "4" when "0101" => segments <= "0100100"; -- "5" when "0110" => segments <= "0100000"; -- "6" when "0111" => segments <= "0001111"; -- "7" when "1000" => segments <= "0000000"; -- "8" when "1001" => segments
in „Sekundenzähler auf zwei 7-Segment-Anzeigen“ · FPGA, VHDL & Co. ·
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Datei
Bin2ASCII.vhd
BIN : in bit_vector(3 downto 0)) return bit_vector is variable ASCII : bit_vector(7 downto 0) := (others => '0'); begin case BIN is when "0000" => ASCII := x"30"; when "0001" => ASCII := x"31"; when "0010" => ASCII := x"32"; when "0011" => ASCII := x"33"; when "0100" => ASCII := x"34"; when "0101" => ASCII := x"35"; when "0110" => ASCII := x"36"; when "0111" => ASCII := x"37"; when "1000" => ASCII := x"38"; when "1001" => ASCII := x"39"; when "1010" => ASCII := x"41"; when "1011" => ASCII := x"42"; when "1100" => ASCII
in „[VHDL] Komponenten Einbinden und wegoptimieren von Signalen verhindern“ · FPGA, VHDL & Co. ·
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Datei
BCD2ASCII_MUX.vhd
<= x"36"; when "0111" => ASCII <= x"37"; when "1000" => ASCII <= x"38"; when "1001" => ASCII <= x"39"; when "1010" => ASCII <= x"41"; when "1011" => ASCII <= x"42"; when "1100" => ASCII <= x"43"; when "1101" => ASCII <= x"44"; when "1110" => ASCII <= x"45"; when "1111" => ASCII <= x"46"; when others => ASCII <= x"30"; end case; end process; end Behavioral;
in „[VHDL] Komponenten Einbinden und wegoptimieren von Signalen verhindern“ · FPGA, VHDL & Co. ·
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PDF
Samsung_SDI.pdf
detected. 7.2 Terminals handling 7.2.1 Excessive force on the negative terminal should be avoided when external lead is welled. 7.3 Transportation 7.3.1 If the cell is necessary to transported to other place, such as the battery manufacturer, careful precautions should be taken to avoid damage of cell. 8. Others 8.1 Disassembly 8.1.1 The cell should not be dismantled from the battery pack. 8.1.2 Internal short-circuit caused by disassembly may lead to heat generation and/or venting. 8.1.3 When the electrolyte
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PDF
WW23N3SWT4-W.pdf
White LEDs is changed a little by an operation current. Care should be taken after due consideration when using LEDs. (1) Lead Forming a. At least 3mm from the base of the epoxy bulb should be keep when forming leads. b. Do not use the base of the leadframe as a fulcrum during lead forming. Lead forming
in „LEDs: Konstantstrom-Multiplexing. Schaltung & Teile so ok?“ · Mikrocontroller und Digitale Elektronik ·
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Datei
DEC7S.vhd
"0101" => help := "10110110"; -- 5 when "0110" => help := "10111110"; -- 6 when "0111" => help := "11100000"; -- 7 when "1000" => help := "11111110"; -- 8 when "1001" => help := "11110110"; -- 9 when "1010" => help := "11101110"; -- A when "1011" => help := "00111110"; -- B when "1100" => help := "10011100"; -- C when "1101" => help := "01111010"; -- D when "1110" => help := "10011110"; -- E when "1111" => help := "10001110"; -- F when others => help := "00000000"; end case
in „Gray Code und Zweierkomplement Addition“ · FPGA, VHDL & Co. ·
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PDF
DEM16216.pdf
0 0 0 0 1 D C B Control display/cursor/blink ON/OFF 1-bit register. D: Display ON/OFF control bit When D=”1”, entire display is turned on. When D=”0’, display is turned off, but display data remains in DDRAM. C: cursor or ON/OFF control bit When C=”1”, cursor is turned on. When C=”0”, cursor disappears
in „LCD Ansteuern mit PIC 16F84A funzt nicht“ · Mikrocontroller und Digitale Elektronik ·
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Datei
test.vhd
std_logic := '0'; signal gray: integer range 0 to 7 := 0; signal writing: boolean; begin c_da <= c_d when c_oe = '0' and c_we = '1' else (others => 'Z'); m_d <= c_d when writing else (others => 'Z'); m_we <= '0' when writing else '1'; m_oe <= '0'; d_flm <= frame_pulse; d_m <= ac_drive; d_ena <= '1'; address_latch
in „XC9572XL als GLCD-Treiber mit Stabilitätsschwäche. Code-Problem? EMV? Defekt?“ · FPGA, VHDL & Co. ·
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PDF
dem16216syh-py.pdf
0 0 0 1 D C B Control display/cursor/blink ON/OFF 1 bit register. D : Display ON/OFF control bit When D = "1" , entire display is turned on . When D = "0" , display is turned off, but display data is remained in DDRAM . C : Cursor ON/OFF control bit When C = "1" , cursor is turned on. When C = "0" ,
in „zweite Zeile eines Displays ansprechen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
DEM16216SYH-PY.pdf
0 0 0 1 D C B Control display/cursor/blink ON/OFF 1 bit register. D : Display ON/OFF control bit When D = "1" , entire display is turned on . When D = "0" , display is turned off, but display data is remained in DDRAM . C : Cursor ON/OFF control bit When C = "1" , cursor is turned on. When C = "0" ,
in „PIC16F690 init vom LCD funzt nich“ · Mikrocontroller und Digitale Elektronik ·
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Datei
int_to_bcd.vhd
downto 0) ); end INT_TO_BCD; architecture arch of INT_TO_BCD is begin process (q) begin case q is when 0 => BCD_OUT <= "0000"; when 1 => BCD_OUT <= "0001"; when 2 => BCD_OUT <= "0010"; when 3 => BCD_OUT <= "0011"; when 4 => BCD_OUT <= "0100"; when 5 => BCD_OUT <= "0101"; when 6 => BCD_OUT <= "0110"; when 7 => BCD_OUT <= "0111"; when 8 => BCD_OUT <= "1000"; when 9 => BCD_OUT <= "1001"; when others => BCD_OUT <= "1110"; end case; end process; end;
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Datei
ampel_mit_einem_takt.vhd
=> dec_out <= "110"; when 8 => dec_out <= "001"; when 9 => dec_out <= "001"; when 10 => dec_out <= "001"; when 11 => dec_out <= "001"; when 12 => dec_out <= "001"; when 13 => dec_out <= "001"; when 14 => dec_out <= "001"; when 15 => dec_out <= "001"; when others => dec_out <= "010"; end case; end process; red <= dec_out(2); yellow <= dec_out(1); green <= dec_out(0); end Behavioral;
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circuits.pdf
to operate at the crystal’s third overtone frequency could do so otherwise at its fun- damental. When power is first applied to an oscillator the signal am- plitude builds up until it is limited by the non-linearity of its maintaining amplifier or, by an external level-control circuit. In the former
in „Als Mikro noch Makro war: Die "Dicke Tal- Uhr"“ · HF, Funk und Felder ·
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Datei
runangle.vhd
END IF; WHEN 1 => -- ausführen Xa,Ya,Zz=>FP und Pi/2-AZFP,Pi/2 +/- ATFP IF ctrclk > 0 THEN ctrclk := ctrclk -1; ceXYZFP <= '0';--reset CE stateangle <= 1; ELSE StartON := '1'; stateangle <= 2; END IF; WHEN 2 =>
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PDF
Atmel-9251-ATA6836C-ATA6838C-Open-Load-Detection_Application-Note.pdf
activates Open load Detection no Open load detected Open load detected Open load removed Notes: 1. When OLD = 1, the HSx/LSx DO bits report the Switch Status of the outputs 2. When OLD = 0, the HSx/LSx DO bits report the Open Load Status of the outputs 3. OUTx refers to the HSx/LSx bits in the Data Output
in „Keine Open Load Meldung bei ata6836c und IFX9201SG!“ · Mikrocontroller und Digitale Elektronik ·
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PDF
LCD-Display.PDF
Driver Circuit Total of 16 commons and 40 segments signal drivers are valid in the LCD driver circuit. When a program specifies the character fonts and line numbers, the corresponding common signals output drive-waveforms and the others still output unselected waveforms. The relationships between Display
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PDF
TC1602A-09I.PDF
Driver Circuit Total of 16 commons and 40 segments signal drivers are valid in the LCD driver circuit. When a program specifies the character fonts and line numbers, the corresponding common signals output drive-waveforms and the others still output unselected waveforms. The relationships between Display
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PDF
Atmel_AVR1916__USB_DFU_Boot_Loader_for_XMEGA.pdf
reserved. / Rev.: 8429B−AVR−08/2012 Atmel , logo and combinations thereof, AVR , STK , XMEGA , and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. ® Windows and others are registered trademarks or trademarks of Microsoft Corporation in U.S. and or other countries. Other terms and product names may be trademarks of others. Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted
in „Bootloader für ATXmega“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Display_TC1604A_01.PDF
Driver Circuit Total of 16 commons and 40 segments signal drivers are valid in the LCD driver circuit. When a program specifies the character fonts and line numbers, the corresponding common signals output drive-waveforms and the others still output unselected waveforms. The relationships between Display
in „Display TC1604A 01 - LED Spannung“ · Mikrocontroller und Digitale Elektronik ·
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Datei
code.txt
> TS <= "00000010000"; A <= 6; when 6 => TS <= "00000100000"; A <= 7; when 7 => TS <= "00001000000"; A <= 8; when 8 => TS <= "00010000000"; A <= 9; when 9 => TS <= "00100000000"; A <= 10; when 10 => TS <= "01000000000"; A <= 11; when 11 => TS <= "10000000000"; A <= 12; when 12 => TS <= "11111111111"; A <= 0; when others => A <= 0; end case; end if; end process;
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Datei
pkg_AHBlite.vhd
"; --4 when "0101" => var:="0000000000100000"; --5 when "0110" => var:="0000000001000000"; --6 when "0111" => var:="0000000010000000"; --7 when "1000" => var:="0000000100000000"; --8 when "1001" => var:="0000001000000000
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PDF
AVR053.pdf
purpose of this register is to be able to tune the oscillator frequency. This tuning is utilized when calibrating the RC oscillator. When a device is calibrated by Atmel the calibration byte is stored in the Signature Row of the device. The calibration byte can vary from one device to the other, as
in „OSCCAL für 8MHz ?!? be ATTiny26“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AVR053.PDF
purpose of this register is to be able to tune the oscillator frequency. This tuning is utilized when calibrating the RC oscillator. When a device is calibrated by Atmel the calibration byte is stored in the Signature Row of the device. The calibration byte can vary from one device to the other, as
in „Osccal für EEPROM bei mega8535 mit Quarz“ · Mikrocontroller und Digitale Elektronik ·
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PDF
DEM128064J_SBH-PW-N.pdf
series MPU, this pin is treated as the “R/W” signal of the 6800 MPU and decides the access type : When R/W = “H”: Read. When R/W = “L”: Write. • When connected to 8080 series MPU, this pin is treated as the “/RD” signal of the 8080 MPU and is LOW-active. 5 /RD The data bus is in an output status when
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Datei
simple_counter.txt
count; count: Process (clk) variable counter : std_logic_vector(6 downto 0); begin case counter is when "1110011" => next_state<=(others=>'0'); when others => next_state<=counter+1; end case; if (clk='1' and clk'event) then counter:=next_state; end if; output<=counter; end Process count; end Behavioral
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Datei
MFWSender.vhd
" when "0001", "01100000000011000100000110001000000000110000000001110000000011100000000111000000001110000000011000000000110000000001100010000010001100000000011100000000111000000001110000000011100000000111000000001100000000011000100000110001000000000111000000001110000000011100000000111000000001110000000011000000000110000000001100010000000001100000000011100000000111000000001110000000011100000000111000000001100000000011000100000110011000000000111000000001110000000011100000000111000000001110000000011000000000110001000001100010000000001110000000011100000000111000000001110000
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PDF
808967_5000mAH_3.7V.pdf
Specification ……………………………………………………..4 4.Battery Cell Performance Criteria ……………………………..5 5.Storage and others ……………………………………………...6 6.Drawing(not in scale)………………………………………...….7 Handling Precautions and Guideline …………..………………9 1.Charging ……………………………………………………......9 2.Discharging …………………………………………………….9 3.Discharging
in „NXP verschenkt ARM-Chips“ · Mikrocontroller und Digitale Elektronik ·
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PDF
808967_5000mAH_3.7V.pdf
Specification ……………………………………………………..4 4.Battery Cell Performance Criteria ……………………………..5 5.Storage and others ……………………………………………...6 6.Drawing(not in scale)………………………………………...….7 Handling Precautions and Guideline …………..………………9 1.Charging ……………………………………………………......9 2.Discharging …………………………………………………….9 3.Discharging
in „SAMMELBESTELLUNG: Lithium Polymer Zellen 3,7V/5Ah“ · Markt ·
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PDF
808967_5000mAH_3.7V.pdf
Specification ……………………………………………………..4 4.Battery Cell Performance Criteria ……………………………..5 5.Storage and others ……………………………………………...6 6.Drawing(not in scale)………………………………………...….7 Handling Precautions and Guideline …………..………………9 1.Charging ……………………………………………………......9 2.Discharging …………………………………………………….9 3.Discharging
in „SAMMELBESTELLUNG: Lithium Polymer Zellen 3,7V/5Ah“ · Markt ·
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PDF
ICNN95-ParallelCascor.pdf
Japan. E-mail : ingrid@is.tokushima-u.ac.jp ABSTRACT Some problems of "unlearning" were encountered when using Fahlman's Recurrent Cascade Correlation Learning Architecture (RCC) for phoneme recognition. In this paper we present a parallel-modular RCC. The original RCC is transformed into a modular RCC
in „Fehlenden Signalabschnitt rekonstruieren“ · Digitale Signalverarbeitung / DSP / Machine Learning ·
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Datei
mod_m_counter.vhd
unsigned(N-1 downto 0); begin -- register process(clk,reset) begin if (reset='1') then r_reg <= (others=>'0'); elsif (clk'event and clk='1') then r_reg <= r_next; end if; end process; -- next-state logic r_next <= (others=>'0') when r_reg=(M-1) else r_reg + 1; -- output logic q <= std_logic_vector(r_reg); max_tick <= '1' when r_reg=(M-1) else '0'; end arch;