-
PDF
doc8033.pdf
Please refer to the device datasheets and other relevant application notes for details. Figure 1-1. DAC Overview Data Register 0 S/H 1x DAC Block Data Register 1 S/H 1x Event System Rev. 8033B-AVR-04/08 2 Module Overview This section provides an overview of the basic configuration options and functionality
in „xmega DAC geht nicht im power save sleep?“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
C8051F120.txt
CONTROL TH0 DATA 08CH ; TIMER/COUNTER 0 HIGH BYTE TH1 DATA 08DH ; TIMER/COUNTER 1 HIGH BYTE PLL0DIV DATA 08DH ; PLL DIVIDER CKCON DATA 08EH ; CLOCK CONTROL PLL0MUL DATA 08EH ; PLL MULTIPLIER PSCTL DATA 08FH ; FLASH WRITE
in „Probleme mit LCD initialisierung“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
FET140_demolist_C.txt
ACLK fet140_dma_04.c - DMA0, Block Mode UART1 9600, 32kHz ACLK fet140_dma_05.c - DMA0, Rpt'd Blk to DAC0, Sine Output, TACCR1, DCO fet140_dma_06.c - DMA2, Rpt'd Blk to DAC1, 8-Bit Sine, TBCCR2, DCO fet140_dma_07.c - DMA0/1, Rpt'd Blk to DAC0/1, Sin/Cos, TACCR1, XT2 fet140_dma_08.c - DMA0, Rpt'd Blk, I2C
in „MSP430 UART Baudrate einstellen“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
XMEGA-1.pdf
www.atmel.com CONFIDENTIAL 14 XMEGA Schedule Device Eng Samples Samples Mass Prod ATxmega128A1 Q1-08 Q1-08 Q2-08 ATxmega64A1 Q1-08 Q1-08 Q2-08 ATxmega256A3 Q2-08 Q3-08 Q4-08 ATxmega32A4 Q2-08 Q3-08 Q4-08 ATxmega16A4 Q2-08 Q3-08 Q4-08 ATxmega256A1 Q3-08 Q4-08 Q1-09 ATxmega128A3 Q3-08 Q4-08 Q1-09 ATxmega64A3 Q3-08 Q4-08 Q1-09 www.atmel.com CONFIDENTIAL 15
in „Einladung: XMEGA AVR - Vortrag der Firma Atmel“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
YigFilter.asm
*********************************************** Tab5x7: .db $1C,$22,$32,$2A,$26,$22,$1C,0 ; 0 .db $08,$0C,$08,$08,$08,$08,$1C,0 ; 1 .db $1C,$22,$20,$10,$08,$04,$3E,0 ; 2 .db $3E,$10,$08,$10,$20,$22,$1C,0 ; 3 .db $10,$18,$14,$12,$3E,$10,$10,0 ; 4 .db $3E,$02,$1E,$20,$20,$22,$1C,0 ; 5 .db $18,$04,$02,$1E
in „Grafik LCD als text Display nutzen“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
dac_adc.h
define get_adcB() ADCB_CH0RES void init_adc_A_frun(char gain); void init_adc_B_frun(char gain); void dac_init(void); void set_dac_val(int val); void init_adc_A_frun(char gain) { ADCA.CTRLA = 0x01; //ADC enable ADCA.CTRLB = 0x08; //unsigned mode,12Bit, Free Running Mode, Convertion mode 1 ADCA.REFCTRL =
in „atXmega 128 A3 - DAC“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
AD1937.pdf
50 49 AGND 1 48 AGND MCLKI/MCLKXI 2 47 FILTR MCLKO/MCLKXO 3 46 AGND AGND 4 45 AVDD AVDD 5 44 AGND DAC3LP 6 43 DAC2RN DAC3LN 7 42 DAC2RP AD1937 DAC3RP 8 TOP VIEW 41 DAC2LN (Not to Scale) DAC3RN 9 DIFFERENTIAL OUTPUT 40 DAC2LP DAC4LP 10 39 DAC1RN DAC4LN 11 38 DAC1RP DAC4RP 12 37 DAC1LN DAC4RN 13 36 DAC1LP
in „Aktives Filter simulieren“ · Analoge Elektronik und Schaltungstechnik ·
-
PDF
LTC2631.pdf
Internal Ref. ±10 ±10 ±10 ±10 μV/°C Coefficient (Note 5) FSE Full-Scale ErrorV CC= 3V, Internal Ref. l ±0.08 ±0.4 ±0.08 ±0.4 ±0.08 ±0.4 ±0.08 ±0.4 %FSR (Note 15) VFSTC Full-Scale V CC=3V,InternalRef.(Note10) Voltage C-Grade ±10 ±10 ±10 ±10 ppm/°C Temperature I-Grade ±10 ±10 ±10 ±10 ppm/°C Coefficient H-Grade
in „STM32 -> LTC2870 -> DA-70157“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
69034fe-6.pdf
Waveform— Programming Frequency to 68MHz (ADR Pin Set LOW) ADDRESS 0 0 1 0 1 1 ADR WR OCT3 OCT2 OCT1 OCT0 DAC9 DAC8 DAC7 DAC6 DAC5 DAC4 DAC3 DAC2 DAC1 DAC0 CNF1 CNF0 START STOP SDA 0 0 1 0 1 1 1 0 ACK 1 1 1 1 1 1 1 1 ACK 1 1 1 1 1 1 0 0 ACK 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 SCL 69034 TD03
in „I2C Deadlock beim Senden - LTC6904“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
Ansteuerung_SED1374.asm
clock freq. 1,4MHz! dec Cnt ; does not change Cy cbi PortD,SClk ; DAC-clock ~\_ brne ADDA3 ; 12 bit reached ? cbi PortD,LdDac ; DA-converter /load ~\_ nop sbi PortD,LdDac ; DA-converter /load _/~ ;***********************************************************************
in „Strings im Flash“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
FET140_demolist_c.txt
oF</li> <li>fet140_clks.c - BasicClock Output buffered SMCLK, ACLK and MCLK</li> <li>fet140_dac12_01.c - DAC12.0 Output 1V</li> <li>fet140_dac12_02.c - DAC12.1 Output 2V</li> <li>fet140_dac12_03.c - DAC12.0 Output Voltage Ramp</li> <li>fet140_dma_01.c - DMA0 Repeated Burst to-from RAM, Software
in „MSP430 SPI-Datenübertragung temperaturabhängig?“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
MC9S08MM128RM.pdf
is connected to the PDB output. MC9S08MM128 Series Devices Reference Manual, Rev. 3 Freescale Semiconductor 279 Chapter 13. 12-Bit Digital-to-Analog Converter (DAC12LVLPV1) Figure 13-1. MC9S08MM128 series Block Diagram Highlighting DAC Block
in „Freescale s08mm128 und USB“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
AudioCodec-WM8731_8731L.pdf
WM8731L Production Data E B I L D S D C O C S S M AVDD CONTROL INTERFACE WM8731 VMID HPVDD Bypass, Reg 08h MUTE HPGND AGND ATTEN/ MUTE +6 to -73dB 1 dB Steps, Reg 06h SIDEATT, MICBIAS RLINEIN Mute Reg 08h VOL/ H/P Reg 02h INSEL, Reg 08h MUTE DRIVER RHPOUT RLINEIN VOL MUTE MUX ADC DAC MUTE Σ +12 to -34.5dB, 1.5dB Steps,TE Reg 02h C DACMUTE SIDETONE I h g DC D h Reg 0Ah Reg 08h ROUT 0dB/ M 0 R C0 DIGITAL P 0 MICIN 20dB T e D Ae FILTERS A e M R C R D R MIC BOOST Reg 08h M DReg 0Ah SReg 08h LOUT MUTE MUX ADC DAC MUTE Σ VOL MUTE LLINEIN VOL/ H/P +12 to -34.5dB, 1.5dB Steps,EIN
in „Elektret-Mikrofon-Verstärker-->Line-In mit assymmetrischer Vers.Sp.“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
WM8731_WM8731L.pdf
WM8731L Production Data E B I L D S D C O C S S M AVDD CONTROL INTERFACE WM8731 VMID HPVDD Bypass, Reg 08h MUTE HPGND AGND ATTEN/ MUTE +6 to -73dB 1 dB Steps, Reg 06h SIDEATT, MICBIAS RLINEIN Mute Reg 08h VOL/ H/P Reg 02h INSEL, Reg 08h MUTE DRIVER RHPOUT RLINEIN VOL MUTE MUX ADC DAC MUTE Σ +12 to -34.5dB, 1.5dB Steps,TE Reg 02h C DACMUTE SIDETONE I h g DC D h Reg 0Ah Reg 08h ROUT 0dB/ M 0 R C0 DIGITAL P 0 MICIN 20dB T e D Ae FILTERS A e M R C R D R MIC BOOST Reg 08h M DReg 0Ah SReg 08h LOUT MUTE MUX ADC DAC MUTE Σ VOL MUTE LLINEIN VOL/ H/P +12 to -34.5dB, 1.5dB Steps,EIN
in „Altera DE1 Board: Frage zu I2C Bus Adresse vom Audiocodec.“ · FPGA, VHDL & Co. ·
-
Datei
tbf5030_c3a_3.c
> 2) err_cnt2 = 0; } else dout_data1 = dout_data1 & 0xfb; //system error(LED) = ON d_out(); //-->> dac2_data = 0; //DAC8043 testing write_dac2_byte(); dac3_data = 0; //DAC8043 testing write_dac3_byte(); dac4_data = 0; //DAC8043 testing write_dac4_byte(); if(system_led == 1) dout_data1 = dout_data1 &
in „Fehler beim Compilieren“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Forum.PDF
C:\Aussortieren_Vor Win10\..\Compute Moen3+B.yS:chDoc 1 2 3 4 1 2 3 4 A A Not Used +12 B P B Pc U1_dacB I2C U2_dac U1_dacA PI1d0LM358DR POI20SD SCL I2Cs.I2C0.SC PI2a0 SCL VOUT PI2d0 PU0c3 LM358DR PUdc7 SDA I2Cs.I2C0.SDA PI2a0SDA P1d0 PI1d0 PU0c2 P PI2a0A0 CR1_dac P Pc 10k 1% 1206 PI2a0VDD VSSPI2d0 P
in „Raspberry Pi Compute Module 3 (Carrier Board)“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
WM8731.pdf
WM8731L Production Data E I L D S D C O C S S M AVDD CONTROL INTERFACE WM8731 VMID HPVDD Bypass, Reg 08h MUTE HPGND AGND ATTEN/ MUTE +6 to -73dB 1 dB Steps, Reg 06h SIDEATT, MICBIAS RLINEIN Mute Reg 08h VOL/ H/P Reg 02h INSEL, Reg 08h MUTE DRIVER RHPOUT RLINEIN VOL MUTE MUX ADC DAC MUTE Σ +12 to -34.5dB, 1.5dB Steps,TE Reg 02h C DACMUTE SIDETONE I h g Dh h Reg 0Ah Reg 08h ROUT 0dB/ M 0 R C0 DIGITAL P 0 MICIN 20dB T e D Ae FILTERS A e M R P R D R MIC BOOST Reg 08h M DACMUTE SIDETONE LOUT MUTE Reg 0Ah Reg 08h MUX ADC DAC MUTE Σ VOL MUTE LLINEIN VOL/ +12 to -34.5dB, 1.5dB
in „Deemphasis bei Audio-DAC“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
DACsine.c
Hardware : Applicable to ADuC702x rev H or I silicon Currently targetting ADuC7026. Description : DAC outputs a sine wave on pin 10 (DAC1). S1.8 must be off DAC is updated with core clock frequency 45MHz. ********************************************************************/ #include<ADuC7026.h> int
in „1 MHz PWM mit welchem Microcontroller?“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
ADIS16209-246154.pdf
output, 0 = input 9 Not used 8 Self-test enable (temporary, bit is volatile): 1 = enabled, AuxiliaryDAC 0 = disabled 7:3 Not used The auxiliary DAC provides a 12-bit level adjustment function. 2 Data-ready enable: 1 = enabled, 0 = disabled The AUX_DAC register controls the operation of the auxiliary DAC
in „Neigungswinkelinkelmessung beweglicher Teile“ · Analoge Elektronik und Schaltungstechnik ·
-
PDF
DAC_Vergleichsliste.pdf
Linear Technology - Product Comparison 08.08.16, 14:35 LTC2656-12 LTC2657-12 LTC2704-12 DACs (#) 8 8 4 Bits (bits) 12 12 12 I/O Serial SPI Serial I2C Serial SPI Output 0V to 2.5V, 0V to 4.096V, 0V 0V to 2.5V, 0V to 4.096V, 0V t0V to 5V, 0V to
in „Ansteuerung DAC mit anschließender Spannungsverstärkung im mV Bereich“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
vs1033d.pdf
, values from DAC LEFT and DAC RIGHT are read and a DAC interrupt is generated. Version 1.01, 2008-09-08 61 VS1033D VLSI VS1033d S o lu tio n y 10. VS1033 REGISTERS 10.7 GPIO Registers GPIO registers, prefix GPIO Reg
in „Layout dringend“ · Platinen ·
-
PDF
1LTC2641_2642.pdf
requiring isolation. A n 10-Lead MSOP and 3mm× 3mmDFN Packages power-on reset circuit clears the LTC2641’s DAC output (LTC2642) to zero scale and the LTC2642’s DAC output to midscale whenpowerisinitiallyapplied.AlogiclowontheCLRpin asynchronously clears the DAC to zero scale (LTC2641) APPLICATIONS ormidscale
in „AVR ISP mkII sagt Kurzschluss zwischen SCK & MOSI“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
CS4272_F1.pdf
and Figures 3-5. Table 12. DAC Digital Interface Formats DAC_DIF2 DAC_DIF1 DAC_DIF0 Description Format Figure 0 0 0 Left Justified, up to 24-bit data (defau0t) 3 0 0 1 I S, up to 24-bit data 1 4 0 1 0 Right Justified, 16-bit Data
in „darf der Chip so warm werden?“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
CS4272.pdf
and Figures 3-5. Table 13. DAC Digital Interface Formats DAC_DIF2 DAC_DIF1 DAC_DIF0 Description Format Figure 0 0 0 Left Justified, up to 24-bit data (defau0t) 3 0 0 1 I S, up to 24-bit data 1 4 0 1 0 Right Justified, 16-bit Data
in „was ist "ATAPI channel mixing" Warum kein Ausgangssignal?“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
xmega_a1.pdf
0x0880 AWEXC Advanced Waveform Extension on port C 0x0890 HIRESC High Resolution Extension on port C 0x08A0 USARTC0 USART 0 on port C 0x08B0 USARTC1 USART 1 on port C 0x08C0 SPIC Serial Peripheral Interface on port C 0x08F8 IRCOM Infrared Communication Module 0x0900 TCD0 Timer/Counter 0 on port D 0x0940
in „Welchen Wert hat der Pull-up-Widerstand dieses XMega?“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
tlv320aic23b.pdf
n p −30 s R e −50 i F −70 −90 0 0.5 1 1.5 2 2.5 3 Normalized Audio Sampling Frequency Figure 3−19. DAC Digital Filter Response 0: USB Mode FILTER RESPONSE vs NORMALIZED AUDIO SAMPLING FREQUENCY 0.10 B 0.08 d 0.06 − s 0.04 o 0.02 p e 0 r −0.02 t F −0.04 −0.06 −0.08 −0.10 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35
in „Brauche ich zwei Enable für BCLK? Darf man das So machen?“ · FPGA, VHDL & Co. ·
-
PDF
tlv320aic23b.pdf
n p −30 s R e −50 i F −70 −90 0 0.5 1 1.5 2 2.5 3 Normalized Audio Sampling Frequency Figure 3−19. DAC Digital Filter Response 0: USB Mode FILTER RESPONSE vs NORMALIZED AUDIO SAMPLING FREQUENCY 0.10 B 0.08 d 0.06 − s 0.04 o 0.02 p e 0 r −0.02 t F −0.04 −0.06 −0.08 −0.10 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35
-
PDF
tlv320aic23b.pdf
n p −30 s R e −50 i F −70 −90 0 0.5 1 1.5 2 2.5 3 Normalized Audio Sampling Frequency Figure 3−19. DAC Digital Filter Response 0: USB Mode FILTER RESPONSE vs NORMALIZED AUDIO SAMPLING FREQUENCY 0.10 B 0.08 d 0.06 − s 0.04 o 0.02 p e 0 r −0.02 t F −0.04 −0.06 −0.08 −0.10 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35
in „Mit welcher Frequenz muss jetzt der Muxer laufen?“ · FPGA, VHDL & Co. ·
-
Datei
iotn3217.h
#define VREF_ADC0REFEN_bp 1 /* ADC0 referance enable bit position. */ #define VREF_DAC1REFEN_bm 0x08 /* DAC1/AC1 reference enable bit mask. */ #define VREF_DAC1REFEN_bp 3 /* DAC1/AC1 reference enable bit position. */ #define VREF_ADC1REFEN_bm 0x10 /* ADC1 reference enable bit mask. */
in „Neue 8-Bit Tinys vorgestellt: 417/814/816/817“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
JQ8400_English.pdf
Data transmit port; to be connected with RX of MCU 5 GND Ground 6 DC-5V Power supply; 3.3V – 5.0V 7 DAC-R DAC right channel audio out 8 DAC-L DAC left channel audio out 9 SPK - To Speaker 10 SPK + To Speaker One-Line Communication Protocols [SKIPPED: due to the need of synchronization requirement, precise
in „Nutzung eines SPI-Flash durch zwei Mikrocontroller“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
Main.java
{ write_dac(i, 0xff,0xff,0x00); } for(int i = 48; i < 64; i++) // lila { write_dac(i, 0xff,0x00,0xff); } for(int i = 64; i < 80; i++) // cyan { write_dac(i, 0x00,0xff,0xff); } for(int i = 80; i < 96; i++) // weiß { write_dac(i, 0xff,0xff,0xff); } for(int i = 96; i < 112; i++) // schwaz { write_dac(i, 0x00,0x00,0x00); } for(int i = 112; i < 255; i++) // schwaz { write_dac(i,i,i,i); } for(int i = 0; i < 640*480/*0xfffff*/
in „VGA Grafikkarte an uC“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
LTC1257.pdf
LTC1257 Complete Single Supply 12-Bit Voltage Output DAC in SO-8 U FEATURES DESCRIPTIO ® 8-Pin SO Package TheLTC 1257isacompletesinglesupply,12-bitvoltage Buffered Voltage Output output D/A converter (DAC) in an SO-8 package. The Built-In 2.048V Reference
in „Elektrometer - Rückkopplung dimensionieren?“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
AT90PWM2_2B_3_3B__2_.pdf
externally decoupled at the AREF pin by a capacitor for better noise performance. 259 4317I–AVR–01/08 Figure 22-1. Digital to Analog Converter Block Schematic DAC Result D2A pin VRef DAC Output Driver 10 1 0 10 10 DAC High bits DAC Low bits DACH DACL e r Update DAC o Trigger S Edge Detector DAATE DATS2
in „Interrupt bem Flankenwechsel beim AVR“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
at90pwm3.pdf
externally decoupled at the AREF pin by a capacitor for better noise performance. 259 4317I–AVR–01/08 Figure 22-1. Digital to Analog Converter Block Schematic DAC Result D2A pin VRef DAC Output Driver 10 1 0 10 10 DAC High bits DAC Low bits DACH DACL e r Update DAC o Trigger S Edge Detector DAATE DATS2
in „Schrittmotorsteuerung mir 90atPWM3“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
ltc1257_logical.txt
() { DAC-Port state: BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5 | BIT6 | BIT7 --------------------------------------------------------- L H H H H H H H } ltc1257_ll_write(21845) { DAC-Port state: # BIT0 | BIT1
in „LTC1257 - Problem mit Ansteuerung (SPI)“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
WAV-PLAY.ASM
out TIMSK,temp EXPL: out SREG,temp_reg reti SAMPLE: ;reload sample timer and send a sample to the DAC in temp_reg,SREG cbi PORTB,DDB4 ;enable \load DAC out TCNT0,timer ;reload timer0 register after interrupt sbi PORTB,DDB4 ;disable \load DAC ;write data to DAC mov temp,word cpi temp,16 breq WO16 ldi
in „DataFlash (Beschreiben+Auslesen)“ · Mikrocontroller und Digitale Elektronik ·
-
Bild
Verschiedene integrierte Schaltkreise auf Alufolie
DAC-08CP KKFM9335 DAC-08CP KKFM9335 DAC-08CP KKFM9335 TL502CN PORTUGAL 8423AB TL502CN ENGLAND 314AB 74LS02N A SK8429 HU
in „Verkaufe diverse Elektronik für den Bastler“ · Markt · · Fotos
-
PDF
DFPlayer_robotsforfun_com.pdf
Specify EQ 7E FF 06 07 00 00 01 FE F3 EF 7E FF 06 07 00 00 01 EF Specified EQ mode is POP 7E FF 06 08 00 00 01 FE F2 EF 7E FF 06 08 00 00 01 EF Repeatedly play the 1 track Specify single repeat 7E FF 06 08 00 00 02 FE F1 EF 7E FF 06 08 00 00 02 EF Repeatedly play the 2nd track playback 7E FF 06 08 00
in „Kennt jemand den Mini-mp3-Player MP3-TF-16P?“ · Analoge Elektronik und Schaltungstechnik ·
-
PDF
WTV020SD.pdf
and WTV020-SD-16P are the same but chip package. MODE VOICES TRIGGER BUSY AUDIO NOTE MP3 256 KEY YES DAC/PWM KEY（3 group of voice） 3 KEY YES DAC/PWM EDGE IRRETRIGGER 5 KEY YES DAC/PWM EDGE RETRIGGER KEY（5 group of voice） 5 KEY YES DAC/PWM ON/OFF(unloop) - 5- 5 KEY YES DAC/PWM ON/OFF(loop) LOOP PLAY(after power on) 256 KEY YES DAC/PWM ON/OFF(edge) 256 KEY YES DAC/PWM ON/OFF(level) TWO LINE SERIAL 256 BY MCU YES DAC/PWM 7.CONTROL MODES 7.1.MP3 MODE In the MP3 mode, WTV020-SD module default with 6 I/Os I/O P02 P03 P04 P05 P06 P07
in „Anfängerfrage 16 Bit seriell übertragen“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
MAX534.pdf
A; all DAC outputs unchanged. 5 0 1 0 1 8-bit DAC data 1 Load input register B; all DAC outputs unchanged. 3 1 0 0 1 8-bit DAC data 1 Load input register C; all DAC outputs unchanged. 4 1 1 0 1 8-bit DAC data
in „D/A Wandler und der reference pin...“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
main.c
pcm1774_sendByte(0x45, 0x27); // R-Channel digital output volume pcm1774_sendByte(0x46, 0x20); // DAC Audio Interface pcm1774_sendByte(0x49, 0xE0); // DAC and analog BIAS power-up pcm1774_sendByte(0x56, 0x01); // Zero-cross detection enable pcm1774_sendByte(0x48, 0x03); // Analog Mixer Power-up pcm1774
in „Probleme mit PCM1774 I2S DAC“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
dac.h
CR_DMAUDRIE2 : 1; // Chan.2 DMA underrun interrupt enable uint32_t : 2; // 04 Software trigger register (DAC_SWTRIGR) uint32_t SWTRIG_1 : 1; // Chan.1 software trigger uint32_t SWTRIG_2 : 1; // Chan.2 software trigger uint32_t : 30; // 08 Channel1 12-bit right-aligned data holding register (DAC_DHR12R1) uint32
in „(STM32) Register Lib mit define oder nicht define..“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
MAX3949_Datenblatt.pdf
Overflow occurs if result > IBIASMAX. Underflow occurs if result < 0. R R/W 7 SET_IBIAS[8] 0 MSB Bias DAC R R/W 6 SET_IBIAS[7] 0 Bias Current R R/W 5 SET_IBIAS[6] 0 Setting R R/W 4 SET_IBIAS[5] 0 Register SET_IBIAS Address = R R/W 3 SET_IBIAS[4] 0 H0x08 R R/W 2 SET_IBIAS[3] 0 R R/W 1 SET_IBIAS[2] 0 R R/
in „MAX3949 über I2Can Arduino wird nicht gefunden“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
kicad_vergleich_v_03.pdf
Teile in den Bibliotheken : EESchema-DOCLIB Version 2.0 EESchema-DOCLIB Version 2.0 74xgxx.dcm 156 24-08-2017 74xx.dcm 167 24-08-2017 ac-dc.dcm 60 24-08-2017 ac-dc.dcm 98 30-10-2017 actel.dcm 18 24-08-2017 adc-dac.dcm 177 24-08-2017 adc-dac.dcm 182 30-10-2017 allegro.dcm 29 24-08-2017 Altera.dcm 7 24-08
in „Neues bei KiCAD Nightly-Builds ab 2017 Okt.“ · Platinen ·
-
PDF
DAC7552.pdf
12 Bits Relative accuracy ±0.35 ±1 LSB Differential nonlinearity Specified monotonic by design ±0.08 ±0.5 LSB Offset error ±12 mV Zero-scale error All zeroes loaded to DAC register ±12 mV Gain error ±0.15 %FSR Full-scale error ±0.5 %FSR Zero-scale error drift 7 µV/°C Gain temperature coefficient 3 ppm
in „Problem mit DAC7552“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Soundausgabe_datasheet.pdf
and WTV020-SD-16P are the same but chip package. MODE VOICES TRIGGER BUSY AUDIO NOTE MP3 256 KEY YES DAC/PWM KEY（3 group of voice） 3 KEY YES DAC/PWM EDGE IRRETRIGGER 5 KEY YES DAC/PWM EDGE RETRIGGER KEY（5 group of voice） 5 KEY YES DAC/PWM ON/OFF(unloop) - 5- www.emartee.com 5 KEY YES DAC/PWM ON/OFF(loop) LOOP PLAY(after power on) 256 KEY YES DAC/PWM ON/OFF(edge) 256 KEY YES DAC/PWM ON/OFF(level) TWO LINE SERIAL 256 BY MCU YES DAC/PWM 7.CONTROL MODES 7.1.MP3 MODE In the MP3 mode, WTV020-SD module default with 6 I/Os I/O P02 P03 P04 P05 P06 P07
in „I2C-Adresse des WTV020-SD“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
41540.pdf
and WTV020-SD-16P are the same but chip package. MODE VOICES TRIGGER BUSY AUDIO NOTE MP3 256 KEY YES DAC/PWM KEY（3 group of voice） 3 KEY YES DAC/PWM EDGE IRRETRIGGER 5 KEY YES DAC/PWM EDGE RETRIGGER KEY（5 group of voice） 5 KEY YES DAC/PWM ON/OFF(unloop) - 5- www.emartee.com 5 KEY YES DAC/PWM ON/OFF(loop) LOOP PLAY(after power on) 256 KEY YES DAC/PWM ON/OFF(edge) 256 KEY YES DAC/PWM ON/OFF(level) TWO LINE SERIAL 256 BY MCU YES DAC/PWM 7.CONTROL MODES 7.1.MP3 MODE In the MP3 mode, WTV020-SD module default with 6 I/Os I/O P02 P03 P04 P05 P06 P07
in „WTV-020 Soudmodul Code für C“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Schematic_Scope_1014D_2023-01-06.pdf
FPGA_SPECIAL_IC_SCL 3 4 GND BANK 3 FPGA_Conf_CLK 5 6 R5 GND 38 B 10K CLOCK INPUTS DIFFIO_B1p,IO 39 DAC_D0 FPGA_Conf_ASDO B R4 23 DIFFIO_B1n,IO 42 DAC_D1 33 24 CLK1,DIFFCLK_0n (DQS1B/CQ1B#,DPCLK2),IO 43 DAC_D2 CLK2,DIFFCLK_1p PLL1_CLKOUTp,IO DAC_D3 U13 25 CLK3,DIFFCLK_1n PLL1_CLKOUTn,IO 44 DAC_D4 X2 R49 R50 MS5351M ADC1_D5A 91 CLK4,DIFFCLK_2p VREFB3N0,IO 46 DAC_D5 C51 C52 25MHz 10K 10K R21 ADC1_D6A 90 CLK5,DIFFCLK_2n (DQ1B),DIFFIO_B9p,IO 49 DAC_D6 1 VDD CLK0 10 33 C79 C13 ADC1_D7A 89 CLK6,DIFFCLK_3p (DQ1B),DIFFIO_B9n,IO 50 DAC_D7 2 XA CLK1 9 ADC1_ENCA 88 CLK7
in „Fnirsi 1014d defekt“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
CS42L51_F3.pdf
Mute (Address 07h) ........................................................................... 55 6.8 DAC Output Control (Address 08h) ................................................................................................ 56 6.9 DAC Control (Address 09h) .......................................
in „STM32H7B3I-DK - Soundausgabe“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Hauptplatine.pdf
Int-Sel M-Lock B Ext-Sel Ext-Sel Ref-Lock Ref-Lock DDS-Reset DDS-Reset PLL-Mux PLL-Mux Level-Ctrl DAC Level-Ctrl File: reference.sch File: pll-dds.sch File: filter.sch File: leveling.sch +3.3V Sheet: Controller J3 1 ISP UPDI DAC Connector 2 3 SDA 4 C1 SDA SCK SCK 5 100n SLE SLE 6 CS-Ref-PLL CS-Ref-PLL
in „Oszillator YIG 1,9-4,4 GHz Avantek ASF-9882/7841“ · HF, Funk und Felder ·
