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PDF
ATM16_doc2466.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „ISP - Pinbelegung“ · Mikrocontroller und Digitale Elektronik ·
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PDF
SC16C550-05.pdf
V or 5.0 V ±10%, unless otherwise specified. Symbol Parameter Conditions 2.5 V 3.3 V 5.0 V Unit Min Max Min Max Min Max V LOW-level clock input voltage −0.3 0.45 −0.3 0.6 −0.5 0.6 V IL(CK) VIH(CK) HIGH-level clock input voltage 1.8 VCC 2.4 V CC 3.0 VCC V VIL LOW-level input voltage −0.3 0.65 −0.3 0.8
in „Probleme beim Senden SC16c550“ · Mikrocontroller und Digitale Elektronik ·
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PDF
156346062-STi7105.pdf
by:on (148.5 MHz Max) n 1, 2PLL8,1024 CLK_DISP_HD t CLOCK_OFF (148.5 MHz Max) g 1,2,PLL,1024 l Freq. o Synth CLK_DSS Div by:on o #0 (36.864 MHz) 1,2PLL 1024 CLK_656 e CLK_DAA (148.5 MHz Max) g (HD) (32.768 MHz) p CLK_GDP3
in „Motorola Vip19x0 (Big brother of Vip1710)“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Ateme16.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „Atmega16 und spi bus“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Ateme16.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „Atmega16 und spi bus“ · Mikrocontroller und Digitale Elektronik ·
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PDF
arm.pdf
A 9..24V P4X103 7 C2 C1C1 PIX104 PION / OFF 10n L2L 3.3V power supply 733-334 4 C0 DR127-470-R 3A max. 8IGND4 1 PIGND8 SW PIN101 PIL2PIL202 VCC LM2676S-ADJ 2 0 0K V2V C1 C2C 32 C3 I2 C4C4 R1R1 R2R2 TGL34-33A 10u 100n 100n 4k7 56 0A C0 31 VKV3V3 I1 0 1 30BQ040 P1 C5C5 C1 C6 VA P2 330u C2 330u 2 R3R3
in „ARM Board Layout“ · Platinen ·
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PDF
AN758.pdf
wound, or 12 – 14 turns if loosely wound. The flux density can then be calculated as: V x 102 B17 30 B max = max ( B 2πfnA I16 IMD ( G15 35 d where: f = Frequency in MHz E D W14 G PE I n = Total number of turns. P13 40 A = Cross sectional area of the toroid in cm . VCC = 50 V,out 300 W PEP V = Peak voltage
in „Stackpole Ferrit Kerne für RF Verstärker“ · HF, Funk und Felder ·
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PDF
_Motorola_AN758.pdf
wound, or 12 – 14 turns if loosely wound. The flux density can then be calculated as: V x 102 B17 30 B max = max ( B 2πfnA I16 IMD ( G15 35 d where: f = Frequency in MHz E D W14 G PE I n = Total number of turns. P13 40 A = Cross sectional area of the toroid in cm . VCC = 50 V,out 300 W PEP V = Peak voltage
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PDF
MGA-62563__AV02-1237EN_.pdf
= 5OΩ,V = 3V (unldss otherwise specified) Symbol ParametersandTestConditions Freq Units Min. Typ. Max. StdDev Id [1,2] Device Current mA 47 62 77 2.09 NF test[1,2 Noise Figure in test circuit [1] f = 0.5 GHz dB 0.93 1.4 0.06 [1,2] [1] G test Associated Gain in test circuit f = 0.5 GHz dB 20.4 22 23.4
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PDF
ATMEGA8_DATENBLATT.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT2 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 51
in „I2C/TWI TWBR > 10 warum?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
LGT8FX8P_databook_v1.0.4.pdf
信号，降序计数下比较匹配 时清零 OC0x 信号 下表为波形产生模式控制。 WGM0[2:0] 工作模式 TOP 值 更新 OCR0X 时刻 置位 TOV0 时刻 立即 0 Normal 0xFF MAX 1 PCPWM 0xFF TOP BOTTOM 2 CTC OCR0A 立即 MAX 3 FPWM 0xFF TOP MAX 4 保留 - - - 5 PCPWM OCR0A TOP BOTTOM 6 保留 - - - 7 FPWM OCR0A TOP TOP 下表为死区时间使能时 OC0A 信号输出波形的极性控制。 死区时间使能模式下 OC0A 信号输出波形的极性控制 DTEN0 COM0A
in „Spot Welder Firmware Update fehlerhaft“ · Mikrocontroller und Digitale Elektronik ·
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PDF
LGT8FX8P_databook_v1.0.4.pdf
信号，降序计数下比较匹配 时清零 OC0x 信号 下表为波形产生模式控制。 WGM0[2:0] 工作模式 TOP 值 更新 OCR0X 时刻 置位 TOV0 时刻 立即 0 Normal 0xFF MAX 1 PCPWM 0xFF TOP BOTTOM 2 CTC OCR0A 立即 MAX 3 FPWM 0xFF TOP MAX 4 保留 - - - 5 PCPWM OCR0A TOP BOTTOM 6 保留 - - - 7 FPWM OCR0A TOP TOP 下表为死区时间使能时 OC0A 信号输出波形的极性控制。 死区时间使能模式下 OC0A 信号输出波形的极性控制 DTEN0 COM0A
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PDF
Mega32.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „AVR Timer/Counter Zeit berechnen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
SCD5580.PDF
Slimline Serial Input Dot Addressable Intelligent Display Package Dimensions in inches (mm) 1.500 max. (38.10) .050 0.145 (2.54) (.47) (1.27) .012 (.30) (3.68) typ. typ. .300 –.020 (10.0 –.15) (7.62 –.51) Pin 1 1.312 ref. 0.200 Indicator (33.32) (5.08) EIA date code Intensity Code SIEMENSX YYWW Z Y
in „[V] 2 St. Punktmatrix Displays SCD5583, 5x5, 8-stellig, grün“ · Markt ·
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PDF
A300_ATMEGA8xxx.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT2 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 51
in „atMega8-16 Au beschreiben“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATmega8.pdf
contains timing data for basic Timer/Counter operation. The figure shows the count sequence close to the MAX value. 70 ATmega8(L) 2486Z–AVR–02/11 ATmega8(L) Figure 28. Timer/Counter Timing Diagram, No Prescaling clkI/O clkTn (clI/O1) TCNTn MAX - 1 MAX BOTTOM BOTTOM + 1 TOVn Figure 29 shows the same timing
in „Mikrocontroller und 15'' TFT LCD“ · Mikrocontroller und Digitale Elektronik ·
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PDF
db_atmega8.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT2 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 51
in „ADC-Input und Auswahlverfahren“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AVR_ATmega_328PB.pdf
selecting crystals, consider the Maximum ESR Recommendations: Table 12-5 Maximum ESR Recommendation for 32.768kHz Crystal Crystal CL [pF] Max. ESR [kΩ] (1) 6.5 75 9.0 65 12.5 30 Note: 1. Maximum ESR is typical value based on characterization. The Low-frequency Crystal Oscillator provides an internal load capacitance
in „ATmega328PB: UART(MC) empfängt falsche Daten“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MT6223C.pdf
– 0.4 EA6 ▯ max 16, min 2 ▯ 0.4 ▯ ▯ EA7 ▯ max 16, min 2 ▯ 0.4 VMEM – 0.4 ▯ ▯ VMEM – 0.4 EA8 ▯ max 16, min 2 ▯ 0.4 ▯ ▯ EA9 ▯ max 16, min 2 ▯ 0.4 VMEM – 0.4 ▯ ▯ VMEM – 0.4 EA10 ▯ max 16, min 2 ▯ 0.4 ▯ ▯ EA11 ▯ max 16
in „GSM-Modul (SIM908) nur analoge Ausgänge für Anruf?“ · HF, Funk und Felder ·
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PDF
slau049f.pdf
is set when the timer counts from TBR (max) to zero. Figure 12−5 shows the flag set cycle. Figure 12−5. Continuous Mode Flag Setting Timer Clock Timer TBR −1 TBR 0h 1h TBR −1 TBR 0h (max) (max) (max) (max) Set TBIFG Timer_B 12-7 Timer_B Operation
in „Umrechnung: C-Code->Assembler-Code->Cycles“ · Mikrocontroller und Digitale Elektronik ·
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Datei
lcdcon_ft245.asm
zweite Hälfte der Daten behalten or temp2, temp st X+,temp2 cpi XAdresseLow, XMax ;Spalten Adresse > Max ? brlo normal clr XAdresseLow ;Spalten Adresse = 0 inc ZeileL cpi ZeileL, YMax ;Zeilen Adresse > Max ? brlo normal ldi ZeileL, YMin ;Zeile = Beginn XRAM cbr Flags, (1<<ZeileH) ;MSB Spalten Adresse =
in „LCD Controller für 640x480 LCD mit mega8515“ · Projekte & Code ·
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Datei
lcdcon_ft245.asm
zweite Hälfte der Daten behalten or temp2, temp st X+,temp2 cpi XAdresseLow, XMax ;Spalten Adresse > Max ? brlo normal clr XAdresseLow ;Spalten Adresse = 0 inc ZeileL cpi ZeileL, YMax ;Zeilen Adresse > Max ? brlo normal ldi ZeileL, YMin ;Zeile = Beginn XRAM cbr Flags, (1<<ZeileH) ;MSB Spalten Adresse =
in „LCD Controller für 640x480 LCD mit mega8515“ · Projekte & Code ·
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Datei
AVRDUDE-Meldung.txt
Size #Pages MinW MaxW ReadBack ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- --------- application 0 0 0 0 no 131072 256 0 0 0 0x00 0x00 Block Poll Page Polled Memory Type Mode Delay Size Indx
in „PDI + AVR Dragon“ · Mikrocontroller und Digitale Elektronik ·
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PDF
atmel_32uc.pdf
Characteristics Table 12-14. 32 KHz Oscillator Characteristics Symbol Parameter Conditions Min Typ Max Unit 1/(CP32KHz Crystal Oscillator Frequency 32 768 Hz CL Equivalent Load Capacitance 6 12.5 pF CL= 6pF (1) 600 tST Startup Time (1) 1200 ms CL= 12.5pF Active mode 1.8 µA I Current Consumption OSC Standby
in „V: ATMEL 32UC3A0512-U“ · Markt ·
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PDF
UM08001_JLinkARM.pdf
. KG 22 CHAPTER 1 Introduction Data input rise time (Trdi Max. 20ns Data input fall time (T ) Max. 20ns fdi Data output rise time (T rdo Max. 10ns Data output fall time (T ) fdo Max. 10ns Clock rise time (Trc) Max. 10ns Clock fall time (Tfc Max. 10ns Table 1.1
in „[V] J-Link JTAG Adapter USB für ARM abzugeben“ · Markt ·
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PDF
lpc2468board.pdf
10n L1 733-334 4 DR127-470-R 8 GND 1 GND SW VCC LM2676S-ADJ C2 R1 R2 3.3 V power supply 100n 4k7 56 max. 3 A C3 V2 C4 V3 C5 47u TGL34-33A 100n SS24 330u R3 2k7 V4 KP-2012SGC GND GND GND GND GND GND GND GND GND N2 2 6 VIN FB B BOOST 3 B 7 C6 ON / OFF 10n L2 4 DR127-470-R 8 GND 1 GND SW 1V5 LM2676S-ADJ C7 R4 R5 1.5 V power supply 100n 220 0 max. 3 A C8 V5 C9 100n SS24 560u R6 1k V6 KP-2012SGC GND GND GND GND GND GND VBAT VCC 1V5 C C C10 C11 C12 C13 C14 C15 22u 22u 22u 22u 22u 22u B1 C16 CR1632FH 100n GND GND GND GND GND GND GND GND VCC VCC
in „NXP verschenkt ARM-Chips“ · Mikrocontroller und Digitale Elektronik ·
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PDF
5_-_STM32F_Connectivity_Line.pdf
a rN o v e m b e r2 0 1 0 The STM32 Connectivity line is growing with STM32F2XX family (bytes) 1 M 768 K 512 K STM32F107RC STM32F107VCow! New devices are coming with: 256 K -More memory STM32F105RC STM32F105VC -Improved connectivity -USB OTG FS and HS STM32F107RB STM32F107VB -Encryption, … 128 K -FSMC
in „STM32: Timer funktioniert nicht“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AT90CAN128.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 12
in „uC + 3 Schieberegister + 7-Segmentanzeige“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MB91F465DA-FujitsuMediaDevices.pdf
, MHz T A ≤ 105 °C MB91F467DBH max, CLKT ⎯ 48 max, CLKCAN ⎯ 48 max, CLKB ⎯ 92 Permitted operating frequency max, CLKP ⎯ 46 MHz 105 °C ≤ T A ≤ 125 °C MB91F467DBH max, CLKT ⎯ 46 max, CLKCAN ⎯ 46 *8 ⎯ 2000 TA ≤ 85 °C ⎯ 1300 *8 TA ≤ 105
in „LCD Display / Controller eines Schweißgerätes prüfen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PSpice_LibraryguideOrCAD.pdf
Amplifier MAX437 MAX437/MXM MAXIM.OLB Maxim Integrated Circuits Operational Amplifier MAX438 MAX438/MXM MAXIM.OLB Maxim Integrated Circuits Operational Amplifier MAX439 MAX439/MXM MAXIM.OLB Maxim Integrated Circuits
in „pSpice - Bauteil hinzufügen.“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
ATMega164_324_644_1284pa.pdf
maximum ESR recommendations on 9pF and 12.5pF crystals. Table 9-7. Maximum ESR Recommendation for 32.768kHz Watch Crystal Crystal CL (pF) Max ESR [kΩ] (1) 9.0 65 12.5 30 Note: 1. Maximum ESR is typical value based on characterization The Low-frequency Crystal Oscillator provides an internal load capacitance
in „Hilfe bei AD-Wandler!“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Thermoelement.pdf
die Abb. 12 für verschie- c r dene Rohrabmessungen, die Belastungs- D grenzen (Richtwerte) auf. Die max. Druck- belastung zylindrischer Schutzrohre ist als Funktion der Wandstärke bei verschiedenen Rohrdurchmessern dargestellt. Die Angaben gelten für Schutzrohre aus Edel- stahl 1.4571, Einbaulänge 100mm
in „Wie funktioniert Thermosensor in Heizofen“ · Haus & Smart Home ·
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PDF
DCC_Laborbooster.pdf
http://greuphone.magnetmotor.ch/#ibm 67 68 69 noch zu Machen: 70 -Stringlänge über RS232 ist (STRING_MAX_LENGTH =) 21 Zeichen, wird aber nicht abgefangen 71 -Programm säubern/vereinheitlichen und dokumentieren 72 1 'Define für PIC16F1933 2 'jetzt neu für PIC16F1936 (gleich) 3 Define CONFIG1 = 0x0fc2 4 Define CONFIG2 = 0x1dff 5 Define CLOCK_FREQUENCY = 32 'MHz 6 7 Define STRING_MAX_LENGTH = 21 8 9 'DCC-Laborbooster 10 11 'noch nicht implementiert: 12 'Stringlänge über RS232 ist STRING_MAX_LENGTH = 21 Zeichen, wird aber nicht abgefangen 13 14 'PIC-Register: LCD-Modul: Funktion:
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Datei
config-mod-LK511-mt7623n-BPiR2.txt
CONFIG_SENSORS_LTC4222=m CONFIG_SENSORS_LTC4245=m CONFIG_SENSORS_LTC4260=m CONFIG_SENSORS_LTC4261=m CONFIG_SENSORS_MAX1111=m CONFIG_SENSORS_MAX16065=m CONFIG_SENSORS_MAX1619=m CONFIG_SENSORS_MAX1668=m CONFIG_SENSORS_MAX197=m CONFIG_SENSORS_MAX31722=m # CONFIG_SENSORS_MAX6621 is not set CONFIG_SENSORS_MAX6639=m CONFIG_SENSORS_MAX6642
in „Linux Kernel 5.1.1. auf dem BPi-R2“ · PC Hard- und Software ·
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PDF
TMC262_datasheet.pdf
and DIR Interface Timing AC-Characteristics clock period is CLK Parameter Symbol Conditions Min Typ Max Unit Step frequency (at maximum fSTEP DEDGE=0 ½ fCLK microstep resolution) DEDGE=1 ¼ fCLK Fullstep frequency FS fCLK12 max(t , STEP input low time SL t +20)TSD ns CLK STEP input high time SH max(FILTSD
in „Wärmeentwicklung Mosfet“ · Mikrocontroller und Digitale Elektronik ·
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PDF
_ATmega32.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „Anschwingvorgang µC & Quarz“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATMega16.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „DCF auf INT0“ · Mikrocontroller und Digitale Elektronik ·
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PDF
atmel-8393-mcu_wireless-atmega256rfr2-atmega128rfr2-atmega64rfr2_datasheet.pdf
address. 9.12.50 XAH_CTRL_0 – Transceiver Extended Operating Mode Control Register Bit 7 6 NA ($16C) MAX_FRAME_RETRIES3 MAX_FRAME_RETRIES2 XAH_CTRL_0 Read/Write RW RW Initial Value 0 0 Bit 5 4 NA ($16C) MAX_FRAME_RETRIES1 MAX_FRAME_RETRIES0 XAH_CTRL_0 Read/Write RW RW Initial Value 1 1 Bit 3 2 NA ($16C) MAX_CSMA_RETRIES2 MAX_CSMA_RETRIES1 XAH_CTRL_0 Read/Write RW RW Initial Value 1 0 Bit 1 0 NA ($16C) MAX_CSMA_RETRIES0 SLOTTED_OPERATION XAH_CTRL_0 Read/Write RW RW Initial Value 0 0 This register is used
in „AVR-Verlustleistung maximieren“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Atmega128_doc2467.pdf
fixed to 8 bits. In phase correct PWM mode the counter is incremented until the counter value matches Max When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 40.
in „ATMEGA128 Timer“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Keysight_E5061B_VNA.pdf
bias Description Specification DC voltage bias Output Port Port 1, LF Out Range 0 to ± 40 V (100 mA max) Resolution 1 mV ± (0 V to 10 V) 4 mV ± (10 V to 40 V) Accuracy 1 ± {0.1% + 4 mV} (at Open Port) 23 ± 5 °C Output Impedance 50 Ω nominal DC bias monitor at IFBW = AUTO (= < 100 Hz) Voltage accuracy
in „Genauigkeit eines Netzwerkanalysators“ · Mikrocontroller und Digitale Elektronik ·
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PDF
san_connect_id06.pdf
PC IN, HDMI Dolby Virtual Speaker SVGA 800 x 600 60Hz PC IN, HDMI DTS Dolby Digital AAC XGA 1024 x 768 60Hz PC IN, HDMI WXGA 1360 x 768 60Hz PC IN, HDMI Audio-Ausgangsleistung SXGA 1280 x 1024 60Hz PC IN, HDMI (Musik / Sinus): 2 x 20W + 1 x 40W / 2 x 10W + 1 x 20W Teletext: TOP/FLOF Level 2.5 Seitenspeicher
in „Plunder von Pollin:WMDR-143N“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MSP430F5438IPZ.pdf
f DCO = MCLK = SMCLK ) PARAMETER Execution V CC PMMCOREVx 1 MHz 4 MHz 8 MHz 16 MHz UNIT Memory TYP MAX TYP MAX TYP MAX TYP MAX AM, Flash Flash 3.0 V 2 0.37 0.45 1.27 1.47 2.50 2.84 5.00 5.56 mA I RAM 3.0 V 2 0.20 0.29 0.60 0.72 1.12 1.27 2.20 2.60 mA AM, RAM (1) All inputs are tied to 0 V or CC. Outputs
in „Strombelastbarkeit MSP430“ · Mikrocontroller und Digitale Elektronik ·
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Datei
main.c
eeprom_write_byte(&eeFooByte, nKeyPress); dauer = 0; Warte (100); } } } else{ bPortB = 1; } } return 0; int maxValue(int a[1998], int cnt) { int max; for(int i=0 ; i<cnt ; i++) { if(a[i] > a[i-1]) { 1998 = a[i]; } } return max; } int Array [1998]; Array [ 0 ] = 1999 ; Array [ 1 ] = 1998 ; Array [ 2 ] = 1997 ;
in „Geschwindigkeit durch Taster aus einem Array anwählen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATmega48PA-ATmega88PA-ATmega168PA_Datasheet.pdf
ESR recommendations on 6.5pF, 9.0pF and 12.5pF crystals Table 9-7. Maximum ESR Recommendation for 32.768kHz Crystal (1) Crystal CL (pF) Max ESR [k] 6.5 75 9.0 65 12.5 30 Notes: 1. Maximum ESR is typical value based on characterization 28 ATmega48PA/88PA/168PA [DATASHEET] 9223F–AVR–04/14 The low-frequency
in „Probleme mit Int Capt ISR ATmega48PA“ · Mikrocontroller und Digitale Elektronik ·
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PDF
H27UBG8T2BTR-BC_Hynix.pdf
Stand-by Current I CE#=V -CC2, 10 50 uA (CMOS) CC5 WP#=0V/V CC - - Input Leakage Current VIN0 to V CC(MAX) - ±10 uA Output Leakage Current I V =0 to V - - ±10 uA LO OUT CC(MAX) Input High Voltage VIH - Vccx0.8 - Vcc+0.3 V http://www.DataSheet4U.net/ Input Low Voltage VIL - -0.3 - 0.2xVcc V Output High Voltage
in „Fantec Mediaplayer 3DS4600 zeigt nur noch Startbildschirm“ · Mikrocontroller und Digitale Elektronik ·
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PDF
KCPSM3_Manual.pdf
upper case loop:output counter_reg,count_port add counter_reg,01;increment load s0,counter_reg sub s0,max_count;test for max value jump nz,loop;next count Write your PSM program quickly and then use KCPSM3 jump start;reset counter to make a nice formatted version for you to adopt as KCPSM3 Assembler your
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PDF
Sony_M610__MBX-176_.pdf
CSIP 18 E - 40 ENCHG# 15K_F set BATT_PRS# high level=3.24V for EC CSIN 17 T 7 0402 BATT 16 2 1 A 6 69 MAX1909_IINP_HW 1 2 MAX1909_IINP 8 IINP B P MAX1909_CCV_1 1 2 MAX1909_CCV 13 9 MAX1909_CLS B PR25 PR26 MAX1909_CCI 12 CCV D CLS PR28&PR30_Set input current limit to 106.01W X 0_J 0402 1 PC34 1 0 20K_F MAX1909
in „Blitzschaden an Sony Vaio Notebook“ · PC Hard- und Software ·
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PDF
e8_manual_5_July_2008.pdf
. Normally aspirated engines, on the other hand, can use NOS at full load, in this case the max load value should be set to 150kpa (ie the nitrous is always enabled). The max load value is an absolute pressure value in kpa. • Max RPM - If RPM exceeds this value the NOS output will be switched
in „Vollprogrammierbare Zündanlage für 1Zylinder 2 und 4 Takt Motoren“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATmegaXX4.pdf
maximum ESR recommendations on 9 pF and 12.5 pF crystals Table 8-7. Maximum ESR Recommendation for 32.768 kHz Watch Crystal Crystal CL (pF) Max ESR [kΩ] (1) 9.0 65 12.5 30 Note: 1. Maximum ESR is typical value based on characterization The Low-frequency Crystal Oscillator provides an internal load capacitance
in „Atmega644PA Timer3“ · Mikrocontroller und Digitale Elektronik ·
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PDF
lpc2468_evb.PDF
RTCX1 P2.21 / DYCS1 85 PID10RTCX2 P2.22 / DYCS2 / CAP3.0 / SCK0 PID105 I1 R1 PID30CONT GND PID302 32.768 kHz P2.23 / DYCS3 / CAP3.1 / SSEL0 PID1064 IDE PIY10PIY102 3PID10ALARM P2.24 / CKEOUT0 PID1053 R2R2 R3R3 12.000 MHz PID1054 120 V1OV1 10k GND GND P02 I0 94 P2.25 / CKEOUT1 57 I0 HLMP-1600 R2 CO11 CO22
in „Kann sich jemand mein Schema anschauen?“ · Mikrocontroller und Digitale Elektronik ·