-
PDF
MC9S08DZ60.pdf
Information ...........................................................................................216 Chapter 12 Freescale Controller Area Network (S08MSCANV1) 12.1 Introduction...........................................................................................................................
in „Delay Funktion für Freescale“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
rudi_____RX-V4A_TSR-400.pdf
displayed. displayed. Day (0D to 9999D) T2-1 T1-4 T1-7 MAIN VOL:----- T1-2. POWER-RELAY ON OUTLVL MAX: 00 RST NUM: 00003 Maximum value / The operation frequency of the power relay (RY541) Minimum value / 0 to FF −80.0 to +16.0 dB is displayed. T1-8. PROTECTION LOCK T1-5. POWER OFFTIME-OUT The operation
in „Test in der Schaltung STR3A400“ · Analoge Elektronik und Schaltungstechnik ·
-
PDF
grundig32zollLedTV.pdf
D1100 T 176 51 C320 B 128 44 C708 T 171 24 C845 T 43 69 C1006 B 96 39 D1200 T 88 97 L902 T 72 55 R216 B 87 62 R702 T 176 15 C321 B 122 48 C709 T 172 11 C846 T 47 69 C1007 B 89 34 D1201 T 184 73 L903 T 66 99 R217 B 98 73 R703 T 178 12 C322 B 120 53 C710 T 171 15 C847 T 45 71 C1008 B 94 38 D1202 T 14
in „Reparaturbericht LED-TV Grundig 32 VLE 5620 BN Ton gut, aber kein Bild“ · Analoge Elektronik und Schaltungstechnik ·
-
PDF
wavelet.pdf
Ubergang zur Kreisfrequenz (die in der Mathematik gebrau hliche und meist mit ! bezeichnete Gr ▯e) !max = 2▯f max= ▯ (1.11) 1.3.2 Beschreibung durch die Impulsantwort Hier bleibt man im Zeit- oder Ortsbereich. Das Ausgangssignal erh lt man als Faltung mit der Impulsantwort: X1 X1 y(n) = f(k)x(n ▯ k) =
in „Aufbaustudium Weiz / FH Mittweida“ · Ausbildung, Studium & Beruf ·
-
PDF
STM32F429_Reference_Manual.pdf
HSE 180 MHz 4-26 MHz max APBx enable APBx peripheral clocks HSE OSC /1,2,4,8,16 OSC_IN Peripheral clock if (APBx presc =enable APBx timer clocks 1x1 else x2 /M VCO /P Peripheral PLL48CK 48 MHz xN /Q clock enable clocks PLL
in „USB-C Dual-Role-Device DRD mit integriertem OTG FS PHY“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
STM32_Reference_manual.pdf
HSE 180 MHz 4-26 MHz max APBx enable APBx peripheral clocks HSE OSC /1,2,4,8,16 OSC_IN Peripheral clock if (APBx presc =enable APBx timer clocks 1x1 else x2 /M VCO /P Peripheral PLL48CK 48 MHz xN /Q clock enable clocks PLL
in „STM32F4 Timer Triggered DMA SPI – NSS Problem“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
STM8_Programming_Manual.pdf
215 17.7.32 Output idle state register (TIM1_OISR) . . . . . . . . . . . . . . . . . . . . . . . . 216 17.7.33 TIM1 register map and reset values . . . . . . . . . . . . . . . . . . . . . . . . . . 217 18 16-bit general purpose timers (TIM2, TIM3, TIM5) . . . . . . . . . . . . . . . 219 18.1 Introduction
in „STLINK V2 und China Boards“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
xc164_um_v2.1_2004_03_per.pdf
Input Signal Limits System Clock = 10 MHz Input GPT1 Input System Clock = 40 MHz Frequ. Divider Phase Max. Input Min. Level Max. Input Min. Level Frequency Hold Time Factor BPS1 Duration Frequency Hold Time 1.25 MHz 400 ns fGPT/8 01 B 4 × GPT 5.0 MHz 100 ns 625.0 kHz 800 ns fGPT/16 00 B 8 × GPT 2.5 MHz
in „Unterschied Compare match und Period Match“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
H83003H.PDF
Bus Cycle........................................................................................... 216 8.4.9 Multiple-Channel Operation........................................................................... 222 8.4.10 External Bus Requests, Refresh Controller, and DMAC............................
in „H8/300 Frage (genauer H8/3003)“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
SAM-V71Q-SAM-V71N-SAM-V71J_Datasheet.pdf
12-layer AHB Bus Matrix M f 150 MHz MAX 42 SAM V71 [DATASHEET] Atmel-44003E-ATARM-SAM V71-Datasheet_12-Oct-16 10. Product Mapping Figure 10-1. SAM V71 Product Mapping 0x00000000 Address memory space 0x00000000 Code ITCM or Boot Memory Code
in „Atmel SAMV71 CAN FD“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
Lang_EN.txt
8805\r\n0x2265 frmMain.edDemo4Hint=177\r\n0xB1 frmMain.edDemo5Hint=8776\r\n0x2248 frmMain.edDemo6Hint=216\r\n0xD8 frmMain.edDemo7Hint=169\r\n0xA9 frmMain.spEx2DEleLaHint=2D EleLa Control Codes frmMain.mn2DEleLaPP=Project Store Booking frmMain.mn2DEleLaL=Order Delivered frmMain.mn2DEleLaE=Offer Stored frmMain.mnScanerAnalyse
in „Elela - BOM import, Component verlinkt nicht zuvorhandenen Bauteilen“ · Projekte & Code ·
-
PDF
io-controller-hub-9-datasheet.pdf
5.18.9 Function Level Reset Support (FLR).........................................................216 5.18.9.1 FLR Steps...............................................................................216 5.19 USB EHCI Host Controllers (D29:F7 and D26:F7) ..............................................
in „FLASH Memory Chip im Lenovo X200 von 8 MB auf 16 MB vergroessern“ · PC Hard- und Software ·
-
Datei
Noname.map.txt
Application/User/user_interface.o 0x0000000008001f6e UI_GetSelectedMC .text.UI_SetReg 0x0000000008001f72 0x216 Application/User/user_interface.o 0x0000000008001f72 UI_SetReg .text.UI_GetReg 0x0000000008002188 0x534 Application/User/user_interface.o 0x0000000008002188 UI_GetReg .text.UI_ExecCmd 0x00000000080026bc
in „Problem mit STM32F103 und RAM-Größe“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
pic18f2320.pdf
Up to 2 Capture/Compare/PWM (CCP) modules: - Sleep: CPU off, peripherals off - Capture is 16-bit, max. resolution is 6.25CY/16) Power Consumption modes: - Compare is 16-bit, max. resolution is 100 CY )T - PRI_RUN: 150 µA, 1 MHz, 2V - PWM output: PWM resolution is 1 to 10-bit - PRI_IDLE: 37 µA, 1 MHz
in „I2C-Bus Collision“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
PIC16F1939.pdf
Period Register, Prescaler and Postscaler • Two Capture, Compare, PWM Modules (CCP): - 16-bit Capture, max. resolution 125 ns - 16-bit Compare, max. resolution 125 ns - 10-bit PWM, max. frequency 31.25 kHz • Three Enhanced Capture, Compare, PWM modules (ECCP): - 3 PWM time-base options - Auto-shutdown and
in „MPLAB delay und xtalfreq richtig benutzen“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
_ATSAMD20E18A-MU.pdf
time Tstart from a clock request until the clock is available for the peripheral is between: Tstart_max= Clock source startup time + 2 × clock source periods + 2 × divided clock source periods Tstart_min Clock source startup time + 1 × clock source period + 1 × divided clock source period The time between
in „Exposed Pad anschließen? (ATSAMD20E18A-MU und ELMOS E981.03)“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
TC1797_UM_v1.1.pdf
Instruction Result Repeat Latency Rate Latency Rate Integer Pipeline Arithmetic Instructions ABS 1 1 MAX.H 1 1 ABS.B 1 1 MAX.HU 1 1 ABS.H 1 1 MAX.U 1 1 ABSDIF 1 1 MIN 1 1 ABSDIF.B 1 1 MIN.B 1 1 ABSDIF.H 1 1 MIN.BU 1 1 ABSDIFS 1 1 MIN.H 1 1 ABSDIFS.H 1 1 MIN.HU 1 1 ABSS 1 1 MIN.U 1 1 ABSS.H 1 1 RSUB 1 1
in „TC1797 - keine Datenblätter?“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
stm32l431_reference_manual.pdf
register 1 (RCC_APB1SMENR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216 DocID027295 Rev 2 6/1426 38 Contents RM0394 6.4.25 APB1 peripheral clocks enable in Sleep and Stop modes register 2 (RCC_APB1SMENR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
in „ADC differential mode“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
stm32l431_reference_manual.pdf
register 1 (RCC_APB1SMENR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216 DocID027295 Rev 2 6/1426 38 Contents RM0394 6.4.25 APB1 peripheral clocks enable in Sleep and Stop modes register 2 (RCC_APB1SMENR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
in „Offset Data alignment“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
stm32l431_reference_manual.pdf
register 1 (RCC_APB1SMENR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216 DocID027295 Rev 2 6/1426 38 Contents RM0394 6.4.25 APB1 peripheral clocks enable in Sleep and Stop modes register 2 (RCC_APB1SMENR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
in „DMA one shot mode“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
PIC16F18344.pdf
W UA BF 0000 0000 0000 0000 I y 215h SSP1CON1 WCOL SSPOV SSPEN CKP SSPM<3:0> 0000 0000 0000 0000 C 216h SSP1CON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 0000 0000 0000 0000 1 217h SSP1CON3 ACKTIM PCIE SCIE BOEN SDAHT SBCDE AHEN DHEN 0000 0000 0000 0000 6 218h to ― ― Unimplemented ― ― L 21Fh Legend
in „EEPROM Verständnisproblem beim PIC 16F18344“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
SAM3X.pdf
the state-saving instruction sequence and MSR in the state-restoring instruction sequence. BASEPRI_MAX is an alias of BASEPRI when used with the MRS instruction. See “MSR” on page 152. 12.18.6.3 Restrictions Rd must not be SP and must not be PC. 12.18.6.4 Condition flags This instruction does not change
in „ARM SAM3x Zähleingang“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
SAM3X.pdf
the state-saving instruction sequence and MSR in the state-restoring instruction sequence. BASEPRI_MAX is an alias of BASEPRI when used with the MRS instruction. See “MSR” on page 152. 12.18.6.3 Restrictions Rd must not be SP and must not be PC. 12.18.6.4 Condition flags This instruction does not change
in „Arduino Due: Programmierung ohne 16U2“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
PIC18f6622.pdf
17-3: (T4CON). FOSC logFPWM- 5. Configure the CCPx module for PWM operation. PWM Resolution (max) = ---------bits log(2) Note: If the PWM duty cycle value is longer than the PWM period, the CCPx pin will not be cleared. TABLE 17-3: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz PWM Frequency
in „PIC 18F6622 Zeit um EEPROM zu schreiben“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
PIC_18F8722_Data_Sheet.pdf
17-3: (T4CON). ⎛FOSC ⎞ log⎝FPWM-⎠ 5. Configure the CCPx module for PWM operation. PWM Resolution (max) = ---------bits log(2) Note: If the PWM duty cycle value is longer than the PWM period, the CCPx pin will not be cleared. TABLE 17-3: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz PWM Frequency
in „PIC 18F6527 mit 32MHz Takten“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Module_SS2013_-_WS2013-14.pdf
zur Codierung von Bild- und Videosignalen. Dazu z hlen das Design von Quantisierern am Beispiel der Max-Lloyd Optimalquantisierung, die Entropiecodierung mit den Beispielen Hu▯man-Codierung und arithmetischer Codierung sowie Lau ngencodierung.Dar ber hinaus wird auf die Grundlagen der Vektorquantisierung
in „Spezialisierung im Studium? Oder eher generalistisch?“ · Ausbildung, Studium & Beruf ·
-
PDF
siplace-s27hm.pdf
a maximum height of 6 mm and, with the 6-segment collect&place head (S-27 HM), on components to a max. of 8.5 mm. The transport height can be set to allow the machines to be integrated into lines with 830, 900, 930 or 950 mm transport height. Communication between the PCB conveyors of the individual
in „Siplace 80 Potentialverteiler“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
R32C-152_Users_Manual.pdf
00D3h) 52 Intelligent I/O interrupt 9 +212 to +215 (00D4h to 00D7h) 53 Intelligent I/O interrupt 10 +216 to +219 (00D8h to 00DBh) 54 Intelligent I/O interrupt 11 +220 to +223 (00DCh to 00DFh) 55 Reserved +224 to +227 (00E0h to 00E3h) 56 Reserved +228 to +231 (00E4h to 00E7h) 57 CAN0 wakeup +232 to +235
in „Keine UART Programmierung bei R32C möglich“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
rawsource.asm
ZL sts zx_ram+0x35,ZH libmio_isf1: lds XL,zx_ram+0x0c ;DFILE addr lds XH,zx_ram+0x0d andi XH,0x3f ;max 16K subi XH,0xfe ;start at 0x0200 libmio_isf2: adiw XL,1 ;skip first HALT sts libmio_rampos_l,XL sts libmio_rampos_h,XH lds ZL,libmio_keycode ldi ZH,HIGH(libmio_zktable) lsl ZL rol ZH lpm XL,Z+ lpm
-
PDF
PIC18F46J11_39932D.pdf
hardware integrity checking and • Tunable Internal Oscillator (31 kHz to 8 MHz, ±0.15% Typical, ±1% Max). safety interlocks prevent unintentional • 4x PLL Option configuration changes • Hardware Real-Time Clock and Calendar (RTCC): • Secondary Oscillator using Timer1 @ 32 kHz • Fail-Safe Clock Monitor
in „PIC18F46J11 und RTC. Quarz nötig? Anfängerfrage Übersicht verloren ;-(“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
8052AH-BASIC_Users_Manual.pdf
1396.928 1396.364 330 014AH F# 6 1479.968 1481.672 311 0137H G 6 1567.968 1567.347 294 0126H G# 6 1661.216 1663.538 277 0115H A 6 1760.000 1758.779 262 0106H A# 6 1864.640 1865.587 247 00F7H B 6 1975.520 1977.682 233 00E9H C 7 2092.992 2094.545 220 00DCH C# 7 2217.472 2215.385 208 00D0H D 7 2349.312 2351.020
in „Was ist das für eine Platine“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
tFXKSKyORc24h2V2.pdf
IO-Main P.C.B Ass'y Part List REF NO. DESCRIPTION PART NO. Q'TY REMARK C005,C016,C018,C115,C11 6,C215,C216,C309,C310,C4 09,C410,C608,C609,ELEC. CAPACITOR(10uF/25V,M,105℃,TAPING 4*7,MINI)3-SPPW3-235 25 611,C628,C629,C651,C652, C653,C654,C685,C686,C68 7,C688, C020,C514,C515, ELEC. CAPACITOR(22uF/16V,M,105℃
in „Risiko | Nicht?“ · Offtopic ·
-
PDF
MC9S08MM128RM.pdf
. .215 10.3.1 Status and Control Registers 1 (ADCSC1A:ADCSC1n) . . . . . . . . . . . . . . . . . .216 10.3.2 Configuration Register 1 (ADCCFG1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .217 10.3.3 Configuration Register 2 (ADCCFG2) . . . . . . . . . . . . . . . . . . . . . . . . .
in „Freescale s08mm128 und USB“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Reference_Manual.pdf
. 215 5.4.5 Power status register 1 (PWR_SR1) . . . . . . . . . . . . . . . . . . . . . . . . . . 216 5.4.6 Power status register 2 (PWR_SR2) . . . . . . . . . . . . . . . . . . . . . . . . . . 217 5.4.7 Power status clear register (PWR_SCR) . . . . . . . . . . . . . . . . . . . . . . . 218 RM0440 Rev
in „STM32G474RE UART“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
xe166_um_v2.1_2008_08_vol2per.pdf
Input Signal Limits System Clock = 10 MHz Input GPT1 Input System Clock = 40 MHz Frequ. Divider Phase Max. Input Min. Level Factor BPS1 Duration Max. Input Min. Level Frequency Hold Time Frequency Hold Time 1.25 MHz 400 ns GPT/8 01 B 4 × GPT 5.0 MHz 100 ns 625.0 kHz 800 ns GPT/16 00 B 8 × GPT 2.5 MHz 200
in „Kernel State Configuration Register KSCCFG xe164 xe166 xe164f xe16x“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
xc2200_um_v2.1_2008_08_vol2per.pdf
Input Signal Limits System Clock = 10 MHz Input GPT1 Input System Clock = 40 MHz Frequ. Divider Phase Max. Input Min. Level Factor BPS1 Duration Max. Input Min. Level Frequency Hold Time Frequency Hold Time 1.25 MHz 400 ns GPT/8 01 B 4 × GPT 5.0 MHz 100 ns 625.0 kHz 800 ns GPT/16 00 B 8 × GPT 2.5 MHz 200
in „Schlechte Datenblätter von Infineon (CAN)“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
4620.pdf
TIME-OUT TOST OST TIME-OUT TPLL PLL TIME-OUT INTERNAL RESET Note: TOST= 1024 clock cycles. TPLL≈ 2 ms max. First three stages of the PWRT timer. 2004 Microchip Technology Inc. Preliminary DS39626B-page 47 PIC18F2525/2620/4525/4620 4.6 Reset State of Registers Table 4-4 describes the Reset states for all
in „SPI master/slave - schreib/lese befehle ?“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Mikrocontroller-PIC18F2420.pdf
This ⎛FOSC ⎞ double-buffering is essential for glitchless PWM log⎝FPWM-⎠ operation. PWM Resolution (max) = ---------bits log(2) When the CCPRxH and 2-bit latch match TMR2, concatenated with an internal 2-bit Q clock or 2 bits of the TMR2 prescaler, the CCPx pin is cleared. Note: If the PWM duty cycle
in „Spannungseinbruch beim Sampeln des Signals“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Exp_Meth_In_RF_Des--Wes_Hayward.pdf
and the power gain is 9.5 dB. The the input lead through the transformer core Frequency Design, p 216.' 0 Bill Carver. transformers for these amplifiers are often to alter input impedance. This topology is W7AAZ, has built practical versions of this wound on a binocular-type balun core. A early work
in „Literatur zum Selbstbau von Sendern und Empfängern“ · HF, Funk und Felder ·
-
PDF
SH7709.pdf
ports A/D converter • 10 bits ± 4 LSB, 8 channels (ADC) • Conversion time: 16 µs • Input range: 0–Vcc (max. 3.6 V) D/A converter • 8 bits ± 4 LSB, 2 channels (DAC) • Conversion time: 10 µs • Output range: 0–Vcc (max. 3.6 V) Product lineup Power Supply Voltage Operating Abbr. I/O Internal Frequency Model
in „HD6417709A F133B“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
version_1p3_assembler.lst
96: ;***************************************************************************** 97: ; 98: ; The max. value for XTAL is now 78627473 Hz, for use BASIC-52 with 99: ; Dallas 80C320 high speed / low power microcontroller (33 MHz). ASEM-51 V1.3 Copyright (c) 2002 by W.W. Heinz PAGE 3 Line I Addr Code Source
in „Basic für 80C31“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
rm0444-stm32g0x1-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
. . . . . . . . . . . 966 Table 173. Examples of TIMEOUTA settings for various I2CCLK frequencies (max t TIMEOUT = 25 ms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 967 Table 174. Examples of TIMEOUTB settings for various I2CCLK frequencies . .
in „Problem mit Clock Configuration beim STM32G031“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
UM10398_-_LPC11xx_UserManual.pdf
this document is subject to © NXP B.V. 2011. All rights reserved. User manual Rev. 4 — 4 March 2011 216 of 414 NXP Semiconductors UM10398 Chapter 13: LPC111x/LPC11Cxx C_CAN controller 13.6.3.1 CAN transmission request 1 register This register contains the TXRQST bits of message objects 1 to 16. By reading
in „Cortex-M UART im Polling-Betrieb“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
TXT-ExternalControlManual-P-PA-PX-PHHL-english.txt
A7H 00H S-VIDEO4 200 C8H 00H ZOOM 201 C9H 00H FOCUS 214 D6H 00H 3D REFORM 215 D7H 00H SOURCE (!!) 216 D8H 00H RGB(*5) 217 D9H 00H VIDEO 218 DAH 00H 3D REFORM RESET 221 DDH 00H AUTO (SHORT) 222 DEH 00H AUTO (LONG) 225 E1H 00H COMPONENT 226 E2H 00H ZOOM POS UP(HT) 227 E3H 00H ZOOM POS DOWN(HT) 228 E4H
in „Befehl an COM port mit Batch Beamer NEC LT380“ · Softwareentwicklung ·
-
PDF
ps42p3sx_ch._d58a.pdf
CONPENSA 616 PC TTX Contrast offset 00 BLUE CONPENSA 616 -------------------------------------- NR SCALE MAX 64 WTE GAIN 58 R GAIN 127 127 NR SCALE MIN 18 RAST VSIZE 1023 G GAIN 127 127 DE GAIN COR 03 RAST HSIZE 895 B GAIN 127 127 DE GAIN CLIP (90/90/60) SHARP OFFSET 17 R,CR OFFSET 54 63 CE UPPER 240 CLK DLY
in „Netzteil prüfen wie stelle ich das richtig an?“ · Analoge Elektronik und Schaltungstechnik ·
-
Datei
avrdude_out.txt
Size #Pages MinW MaxW ReadBack ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- --------- hfuse 0 0 0 0 no 1 0 0 9000 9000 0x00 0x00 Block Poll Page Polled Memory Type Mode Delay Size Indx Paged Size
in „avrdude braucht lange zum Beenden (Linux)“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
slau144i.pdf
; EDE -> R5. 00XXh SXT R5 ; Sign extend low byte to R5.19:8 ADDA R5,R7 ; Add signed 20-bit values 216 CPUX SLAU144I–December 2004–Revised January 2012 Submit Documentation Feedback Copyright © 2004–2012, Texas Instruments Incorporated www.ti.com Instruction Set Description 4.6.2.50 TST * TST[.W] Test
in „Anfängerprogramm TimerA MSP430“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
64F3048F16-Hitachi.pdf
input-only pins Operating modes Seven MCU operating modes Mode Address Space Address Pins Initial Bus Width Max. Bus Width Mode 1 1 Mbyte A19to A0 8 bits 16 bits Mode 2 1 Mbyte A to A 16 bits 16 bits 19 0 Mode 3 16 Mbytes A23to A0 8 bits 16 bits Mode 4 16 Mbytes A to A 16 bits 16 bits 23 0 Mode 5 1 Mbyte A19to
in „CPU Melkanlage auslesbar? 64F3059F16“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
report_all.txt
| 1.25 | 2.50 | PAD217 | G5 | None L | fpga_0_DDR_SDRAM_DDR_DQ_p | IO | SSTL2_I | 1.25 | 2.50 | PAD216 | H6 | None L | fpga_0_DDR_SDRAM_DDR_DQ_p | IO | SSTL2_I | 1.25 | 2.50 | PAD215 | H5 | None L | fpga_0_DDR_SDRAM_DDR_Addr | O | SSTL2_I | | 2.50 | PAD213 | H4 | None L | fpga_0_DDR_SDRAM_DDR_Addr |
in „Place and Route partially locked IO bus“ · FPGA, VHDL & Co. ·
-
PDF
slau144j.pdf
R13, is incremented. INCX.A @R12 ; Increment lower 20 bits ADCX.A @R13 ; Add carry to upper 20 bits 216 CPUX SLAU144J–December 2004–Revised July 2013 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated www.ti.com Instruction Set Description 4.6.3.2 ADDX ADDX.A Add source
in „MSP430 Gleitkommazahl in Flash speichern“ · Mikrocontroller und Digitale Elektronik ·