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PDF
AN5457.pdf
the line. It can also be expressed as a function of the reflection coefficient ratio, as follows. VZ max 1 + Γ VSWR = VZ min = 1 − Γ, 1 ≤ VSWR ≤ ∞ If VSWR = 1.0, there is no reflected power. The return loss (RL) is a function of the reflection coefficient but expressed in dB. P RL = 10 × log10 incident
in „868MHz Impedanzmatching - Fragen zum Matching-vorgehen“ · HF, Funk und Felder ·
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PDF
MFRC530-NXP.pdf
solution 5. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit T amb ambient temperature 40 - +150 C T stg storage temperature 40 - +150 C V digital supply voltage 0.5 +5 +6 V DDD V DDA analog supply voltage 0.5 +5 +6 V V DD(TVDD) TVDD supply voltage
in „[V] 3St. RFID (Mifare) Lese ICs NXP MFRC530 SO32 (4€)“ · Markt ·
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PDF
USB_Type-C_Spec_R2.1_-_May_2021.pdf
plug or receptacle. See Figure 3-66. The following apply to the power and signal contacts: • 40 mΩ (Max) initial for V BUS, GND and all other contacts. • 50 mΩ (Max) after environmental stresses. • Measure at 20 mV (Max) open circuit at 100 mA. Refer to Section 3.8 for environmental requirements and test
in „USB-C Dual-Role-Device DRD mit integriertem OTG FS PHY“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PDFresult.pdf
131.07 261.63 3EH 260.06 523.25 1EH 528.51 # C 138.59 75H 138.84 277.18 3AH 277.69 554.37 1CH 564.96 D 146.83 6FH 146.28 293.66 37H 292.57 587.33 1BH 585.14 T D # 155.56 68H 156.03 311.13 34H 309.13 622.25 19H 630.15 E 164.81 62H 165.49 329.63 31H 327.68 659.26 18H 655.36 O F 174.61 5DH 174.30 349.23 2EH
in „Pocket Comm One µC“ · Mikrocontroller und Digitale Elektronik ·
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PDF
tiny13.pdf
BOTTOM. There are two cases that give a transition without Compare Match. OCR0A changes its value from MAX, like in Figure 32. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must correspond to
in „ATtiny13 Datenblatt External Clock Source on T0-Pin“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AM335x_Sitara_Prozessor.pdf
and Timing 2 Table 7-68. I C Timing Conditions – Slave Mode STANDARD MODE FAST MODE PARAMETER MIN MAX MIN MAX UNIT Output Condition Cb Capacitive load for each bus line 400 400 pF Table 7-69. Timing Requirements for I C Input Timings (see Figure 7-68) STANDARD MODE FAST MODE NO. MIN MAX MIN MAX UNIT
in „BeagleboneBlack: Sensor über I2C“ · Mikrocontroller und Digitale Elektronik ·
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PDF
uploaded_files_documents_org13xx_series_datasheet_u2841.pdf
ratings only. Stresses exceeding Absolute Maximum Ratings may damage the device. Parameter Symbol Min Max Units Power Supply Voltage VCC 0 5.5 V UART Input Voltage V -0.5 7 V RX UART Output Source/Sink Current ITX -10 +10 mA SPI/GPIO Input Voltage VIO_IN 0 1.98 V SPI/GPIO Output Source/Sink Current IIO_OUT
in „Inbetriebnahme ORG-1315“ · Mikrocontroller und Digitale Elektronik ·
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PDF
opa547.pdf
= +25°C, VS= ±30V and E/S pin open, unless otherwise noted. OPA547T, F PARAMETER CONDITION MIN TYP MAX UNITS OFFSET VOLTAGE Input Offset Voltage V = 0, I = 0 ±1 ±5 mV CM O vs Temperature TA= –40°C to +85°C ±25 µV/°C vs Power Supply V S= ±4V to ±30V 10 100 µV/V (1) INPUT BIAS CURRENT Input Bias Current
in „Simples digitalgesteuertes Netzteil nur mit D/A und Op-Amp?“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
Schaltplan.pdf
90 COTP145 40 P6U10105 (OC3A/AIN1) PF2 (ADC2P60101059 NLLED16 20 10 TP COX 01 P AD-SEL0 S E L COTP146 P0 TP P7U10PE4 (OC3B/INT4) PF1 (ADC1)61101060 NLLED15 I0 TP TP NLPE1 TXD0 1 2 PORTC_SEL T0 TP P8U10PE5 (OC3C/INT5) PF0 (ADC0)IU101061 TP SCKC PI310101 PI4101PE0 RXD0D0 PO PROM0SELL 60 TP CTP1477 P9U10PE6
in „V: Leiterplatten aus Überproduktion abzugeben“ · Markt ·
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PDF
ds_22.pdf
Handbücher-Suchmachiene Pulizia DS 22 / DS 80 1. Allargare il foro con una punta da 4 mm di diametro, profondità max. 11 mm. Per ottenere dei buoni risultati di dissaldatura, é molto importante pulire ad intervalli regolari la testa dissaldante. A tale scopo é necessario svuotare il contenitore di rac- 2. Tagliare
in „Fehleranalyse Entlötstation Weller VP 801 EC“ · Mechanik, Gehäuse, Werkzeug ·
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PDF
ATmega32.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „STK500 als ISP“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATM16_doc2466.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „ISP - Pinbelegung“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Ateme16.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „Atmega16 und spi bus“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Ateme16.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „Atmega16 und spi bus“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ml50x_schematics.pdf
Debug PWR Page 25-26 D Mictor, Trace Jack SofTouch Diff SMA Clocks Page 9 Page 11 Switcher 5.0V@10A max Optional GPIO Linear USER Clock 0.9V@1.4A max Page 10 Page 9 Switcher 3.3V@10A max Glock DVI Generator Linear Codec Page 15 2.5V@3A max Page 9 Conn Page 16 2.5V@3A maxCAUX Linear Flash Video In Page 20 Codec Page 17 Linear MGT PLL 1.2V@3A max Virtex 5 C LXT / SXT / FXT C Linear - MGT AVTT RX ZBT SRAM AC97 1.2V@3A max Page 2-6 Audio Page 20 Page 18 Switcher 1.8V@10A max Platform FLASH IIC Linear - MGT AVCC EEPROM 1.0V@3.0A max Page 8 Page
in „DDR2 RAM Ansteuerung mit Virtex-5 ML507“ · FPGA, VHDL & Co. ·
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PDF
SPACE_VECTOR_MODULATION_AND_CONTROL.pdf
length of the reference vector for a general multilevel converter is → → (3-6) V REmax = V max ⋅cos(p /6) . By substituting (3-4) and (3-5) into (3-6), the maximum amplitude of the undistorted line-to-line voltage that a multilevel converter can synthesize is (3-7) V l−max= (n−1)⋅V . dc 3.2 Space
in „Literatur für Raumzeigermodulation“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Mega32.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „AVR Timer/Counter Zeit berechnen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AtMega644P_Datasheet.pdf
TOM. There are two cases that give a transition without Compare Match. OCR0A changes its value from MAX, like in Figure 13-7. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must correspond
in „Alkoholmessgerät programmieren“ · Mikrocontroller und Digitale Elektronik ·
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PDF
atmega644.pdf
TOM. There are two cases that give a transition without Compare Match. OCR0A changes its value from MAX, like in Figure 13-7. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must correspond
in „SPI-Kommunikation Atmega644 - ADS1118“ · Mikrocontroller und Digitale Elektronik ·
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PDF
NT7533Lcd.pdf
(H=1). Caution As the programming range for the internally generated VLCD allows values above the max. allowed VLCD, the customer has to ensure while setting the VOP register and selecting the temperature compensation (TC), that under all conditions and including all tolerances the VLCD remains below
in „Seriell (4-Wire)-LCD-Ansteuerung mit NT7533“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Infineon_TLE9263QX.pdf
Voltage Regulator 2 V CC2, max -0.3 – 28 V VCC2= 40V for P_4.1.4 Load Dump, max. 400 ms; Voltage Regulator 3 V CC3REF,max-0.3 – 28 V VCC3REF= 40V for P_4.1.5 (VCC3REF) Load Dump, max. 400 ms; Voltage Regulator 3 (VCC3B)V -0.3 – V V V = 40V for P_4.1.25 CC3B,max S CC3B + 10 Load Dump, max. 400 ms; Voltage Regulator 3 V CC3SH,max VS – VS V – P_4.1.26 (VCC3SH) - 0.30 + 0.30 Wake Inputs WK1..3 V -0.3 – 40 V – P_4.1.6 WK, max Fail Pin FO1 V FO1, max -0.3 – 40 V
in „SBC für CAN/LIN bei einem 24V Bordnetz“ · Mikrocontroller und Digitale Elektronik ·
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PDF
file.pdf
control nor variable charging currents. Capacity utilization and cycle life depend on V floatnd t pause,max Setting Vfloatlose to the maximum voltage specification (V max) of the lithium-ion cell and increasing tpause,maxaximizes capacity utilization. However, this can deteriorate cycle life, as the charging pulses lead to an exceedance of V max for a certain period of time. 5.1.3.2 Pulse Charging In addition to CCPC protocols, there are also the pulse charging (PC) protocols, where the entire charging procedure is performed by charging pulses
in „Pedelec: Akku und Controller verklebt - ist das rechtens ?“ · Fahrzeugelektronik ·
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PDF
2021_11_09_Projektierungshandbuch_de.pdf
den Nennvolumenstrom. Folgende Richtwerte sollten dabei nicht überschritten werden: dp = 120 Pa/m max von Rohrleitungen DN 10 bis DN 65 w max = 0,7 m/s von Rohrleitungen DN 80 bis DN 125 w max = 1,2 m/s ab Rohrleitungen DN 150 w = 2,0 m/s max Subject to change and error 20/327 Version 11/2021 Abb. 0.8
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PDF
RS0012.pdf
-bit or 8-Bit MPU interface High speed MPU interface: 2MHz 128 x 8-bit display RAM (128 characters max.) Auto power on reset function 5 x 8 and 5 x 10 dot matrix Built-in oscillator Programmable duty cycle: --Graphic mode--1/1.1/2.1/3.1/4.1/5.1/6.1/7.1/8 and 1/16 1/1 : all com output low in the same
in „OLED RAYSTAR REX001602B“ · Mikrocontroller und Digitale Elektronik ·
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PDF
RS0012.pdf
-bit or 8-Bit MPU interface High speed MPU interface: 2MHz 128 x 8-bit display RAM (128 characters max.) Auto power on reset function 5 x 8 and 5 x 10 dot matrix Built-in oscillator Programmable duty cycle: --Graphic mode--1/1.1/2.1/3.1/4.1/5.1/6.1/7.1/8 and 1/16 1/1 : all com output low in the same
in „Brauche Hilfe Oled Display 2x16 EA W162-X3LG“ · Mikrocontroller und Digitale Elektronik ·
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PDF
TLX-1013-E0.pdf
@ \+/ /tl\ @ \y NIPPONSHEETGLASSO.,TD ISSUED ATE DISP_CHOME,CGEROUP I5_12, SHIMOMARUKO OHTAKU,KYO 146-0092JAPAN {: ri TEL:03-5482-363 t ,t .r. , -: - FAX:03-5482-3588 '04, (MANUFACTURE:NACORP.) A,',::3 APPLICATION deliveredrom The specificationpiiesfor LCD modules,NTM164M2lA NIPPON SHEET GI.ASS CO.,
in „[Suche] Display 240x128 mit T6963C Controller“ · Markt ·
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PDF
Spec_NTM164M21A.pdf
@ \+/ /tl\ @ \y NIPPONSHEETGLASSO.,TD ISSUED ATE DISP_CHOME,CGEROUP I5_12, SHIMOMARUKO OHTAKU,KYO 146-0092JAPAN {: ri TEL:03-5482-363 t ,t .r. , -: - FAX:03-5482-3588 '04, (MANUFACTURE:NACORP.) A,',::3 APPLICATION deliveredrom The specificationpiiesfor LCD modules,NTM164M2lA NIPPON SHEET GI.ASS CO.,
in „Grafikdisplay mit T6963-Controller“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ecp_ec.pdf
0 ≤ V ≤ V (MAX) — — 150 µA BHLO IN IH IBHLH Bus Hold High Overdrive current 0 ≤ VIN≤ VIH (MAX) — — -150 µA V BHT Bus Hold trip Points 0 ≤ VIN≤ VIH (MAX) V ILAX) — V IH(MIN) V 2 VCCIO = 3.3V, 2.5V, 1.8V, 1.5V, 1.2V
in „Verwendung der Pins eines Lattice LFECP6 mit Config-Dual-Funktion als I/Os“ · FPGA, VHDL & Co. ·
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PDF
ecp_ec.pdf
0 ≤ V ≤ V (MAX) — — 150 µA BHLO IN IH IBHLH Bus Hold High Overdrive current 0 ≤ VIN≤ VIH (MAX) — — -150 µA V BHT Bus Hold trip Points 0 ≤ VIN≤ VIH (MAX) V ILAX) — V IH(MIN) V 2 VCCIO = 3.3V, 2.5V, 1.8V, 1.5V, 1.2V
in „SPI-Slave im FPGA, Signal-Delay an MISO minimieren“ · FPGA, VHDL & Co. ·
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PDF
VHF-COMM.1984.3.pdf
34.7 mH photograph oftheauthor's prototype. t 1()01c) The filters are decoupled using the low A = max. 13f.l reactive amplifiers. and are simullaneously (0 > 150000) matched to the required terminating and Co = max.3 pF source impedances. Thisallowsa sufficiently good selectivity. and good pulse behavour
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PDF
VHF-COMM.1984.3.pdf
34.7 mH photograph oftheauthor's prototype. t 1()01c) The filters are decoupled using the low A = max. 13f.l reactive amplifiers. and are simullaneously (0 > 150000) matched to the required terminating and Co = max.3 pF source impedances. Thisallowsa sufficiently good selectivity. and good pulse behavour
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PDF
A300_ATMEGA8xxx.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT2 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 51
in „atMega8-16 Au beschreiben“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Pruefungsfragen-2024.pdf
M Abtasttheorem 𝑓abtast: Abtastrate 𝑓min : Minimale Frequenz 𝑓 : Maximale Frequenz 𝑓abtast 2 ⋅ max max für Nicht-Basisband-Signale 𝑓 > 2 ⋅ (𝑓 − 𝑓 wenn 𝑓 < 𝑓 oder 𝑓 > 𝑓 abtast max min abtast min abtast max 𝐶 : Datenübertragungsrate in Bit/s Datenübertragungs-/Symbolrate 𝑅 S : Symbolrate in
in „Amateurfunkprüfung jetzt oder später“ · HF, Funk und Felder ·
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PDF
Sager_D87P_Service_Manual_Part4.pdf
T346 RSMRST# 10K [28] SCI# SCI# R247 22K(R) PDD3 AC14 PDD3 SDD3 AD24 SDD3 T337 PDD2 Y14 AD23 SDD2 T146 C746 [28] SWI# SWI# R246 10K PDD1 Y13 PDD2 SDD2 AB23 SDD1 T335 1U VCORE PDD0 AB16 PDD1 SDD1 AA22 SDD0 T336 [28] PWRBTN# PWRBTN# R245 10K PDD0 SDD0 THERMTRIP#_ICH R169 2 1 62 PDIOW# AA17 ICH5-3 Y22 SDIOW
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PDF
AN10216.pdf
sec)(meters) Length limiting faTyp.number limiting factor I C 400k 2 w iring capacitance 20 400pF max Speed of various connectivity methods (bits/sec) I Cw ith buffer 400k 100 propagation delays any no limit I Chigh speed 3.4M 0.5 w iring capacitance 5 100pF max CAN 1 wire 33k 100 total capacitance
in „AVR TWI: Hängt nach dem Flaschen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
40001722A.pdf
IOCAF — — IOCAF5 IOCAF4 IOCAF3 IOCAF2 IOCAF1 IOCAF0 145 (1) IOCBP IOCBP7 IOCBP6 IOCBP5 IOCBP4 — — — — 146 IOCBN(1) IOCBN7 IOCBN6 IOCBN5 IOCBN4 — — — — 146 IOCBF(1) IOCBF7 IOCBF6 IOCBF5 IOCBF4 — — — — 146 (1) (1) IOCCP IOCCP7 IOCCP6 IOCCP5 IOCCP4 IOCCP3 IOCCP2 IOCCP1 IOCCP0 147 (1) (1) IOCCN IOCCN7 IOCCN6
in „PIC16(L)F1703 low voltage Programmierung?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
WISMO218_AT_Commands_User_Manual-Rev001.pdf
....143 8.5 CPHS proprietary commands..............................................................146 8.6 General purpose proprietary commands..............................................153 8.7 Call and network proprietary commands.............................................163 © 2009 Page: 5 / 172
in „wavecom wismo218 guthaben auslesen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
bluenrg-2.pdf
name Reset RW Description 5:0 CWSEC 0x0 R RTC clockwatch second value. Clockwatch seconds: 0 to 59 (max. 0x3B). 11:6 CWMIN 0x0 R RTC clockwatch minute value. Clockwatch seconds: 0 to 59 (max. 0x3B). 16:12 CWHOUR 0x0 R RTC clockwatch hour value. Clockwatch seconds: 0 to 23 (max. 0x17). RTC clockwatch day
in „DC/DC-Wandler im ST BlueNRG-2 - Wofür?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
LGDP4524.pdf
capacitor to each capacitor connection pin. 3. Set the following voltages within the limits: DDVDH = max 5.5V, VCL = min –3.3V, VGH = max 16.5V, VGL = min –16.5V. nd DUAL – Controls the operndion of the 2 step-up circuit 1.This bit can be enablestin only condition DK=1 to prevent the 2 step up circuit
in „LCD farben invertiert normal ?“ · Mikrocontroller und Digitale Elektronik ·
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Datei
All.txt
DOPPELDIODE.LBR SAL41B 3 VD01 DOPPELDIODE DOPPELDIODE DOPPELDIODE.LBR SAL41B 3 U$9 2.5"HDD 2.5"HDD 2.5"HDD 3 U$8 MAX3000 MAX3000 TSSOP20 3 U$7 MAX3000 MAX3000 TSSOP20 3 U$6 MAX3000 MAX3000 TSSOP20 3 U$5 MAX3000 MAX3000 TSSOP20 3 U4 XBEE XBEE XBEE XBee (TM) /XBee-PRO(TM) OEM RF Modules 3 U$4 MAX3000 MAX3000 TSSOP20
in „[KiCad] Bibliotheksaufbau - Konzeptideen gesucht“ · Platinen ·
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PDF
avr-libc-user-manual.pdf
. . . . . . . . . . . . 144 7.11.3 Compiling and Linking . . . . . . . . . . . . . . . . . . . . . 146 7.11.4 Examining the Object File . . . . . . . . . . . . . . . . . . . 146 7.11.5 Linker Map Files . . . . . . . . . . . . . . . . . . . . . . . . 150 7.11.6 Intel Hex Files . . . . . . . . . . . .
in „C Tutorial gesucht“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PCF8833_1.pdf
selected the P value is set to 1 internally. handbook, full pagewidth VLCD2 F VLCD2 F V2H G V2H G max max V1H VC VC VC VC V1L G G V2L max V2L max VSS F VSS F P = 4 P = 1 MGU941 Fig.32 Bias levels for a MRA system with P = 4 and P = 1. The bias voltage levels are a function of the row voltage The value
in „Versorgung einer LCD Anzeige und MC“ · Mikrocontroller und Digitale Elektronik ·
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PDF
atmel-8393-mcu_wireless-atmega256rfr2-atmega128rfr2-atmega64rfr2_datasheet.pdf
address. 9.12.50 XAH_CTRL_0 – Transceiver Extended Operating Mode Control Register Bit 7 6 NA ($16C) MAX_FRAME_RETRIES3 MAX_FRAME_RETRIES2 XAH_CTRL_0 Read/Write RW RW Initial Value 0 0 Bit 5 4 NA ($16C) MAX_FRAME_RETRIES1 MAX_FRAME_RETRIES0 XAH_CTRL_0 Read/Write RW RW Initial Value 1 1 Bit 3 2 NA ($16C) MAX_CSMA_RETRIES2 MAX_CSMA_RETRIES1 XAH_CTRL_0 Read/Write RW RW Initial Value 1 0 Bit 1 0 NA ($16C) MAX_CSMA_RETRIES0 SLOTTED_OPERATION XAH_CTRL_0 Read/Write RW RW Initial Value 0 0 This register is used
in „AVR-Verlustleistung maximieren“ · Mikrocontroller und Digitale Elektronik ·
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PDF
HX8238A.pdf
262.5 -365 50x110 194 CXP 3487.5 -365 50x110 145 VCIM -187.5 -365 195 CXP 3562.5 -365 50x110 50x110 146 C1P -112.5 -365 50x110 196 CXP 3637.5 -365 50x110 147 C1P -37.5 -365 50x110 197 CXP 3712.5 -365 50x110 148 C1P 37.5 -365 50x110 198 VDDIO 3787.5 -365 50x110 149 C1P 112.5 -365 50x110 199 VDDIO 3862.5
in „TFT- Ansteuerung ET0350G0DH6 (Glyn) mit HX8238 LCD Driver und Microchip Graphic Lib“ · Mikrocontroller und Digitale Elektronik ·
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Datei
flashlog.txt
flash ############### (total 450 bytes transferred in 0.68 s (661 bytes/s) Polling: count = 8, min/avg/max = 13.62/14.06/14.65 ms Verifying: flash #flash error at address 0x0: file=0x12, mem=0x00 flash error at address 0x1: file=0xc0, mem=0x00 flash error at address 0x2: file=0x2b, mem=0x01 flash error at
in „ATMega8 nur bei geringer Taktfrequenz flashbar“ · Mikrocontroller und Digitale Elektronik ·
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PDF
LCD_Dislpay_Treiber_NT7534_132_x_65_Pixel.pdf
Display Control Timing CL (Output) DFR FR (VDD= 2.7 ~ 3.6V, Ta= -40 ~ +85 °C) Symbol Parameter Min. Typ. Max. Unit Condition tDFR FR delay time - 20 80 ns CL = 50 pF (VDD= 1.8 ~ 2.7V, Ta= -40 ~ +85 °C) Symbol Parameter Min. Typ. Max. Unit Condition tDFR FR delay time - 40 160 ns CL = 50 pF 5. Reset Timing
in „LCD Display TG12864R-04 Ansteuern!“ · Mikrocontroller und Digitale Elektronik ·
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PDF
NT7538-LCD-Controller-Datasheet.pdf
Control Timing CL (Output) tDFR FR (VDD = 2.7 ~ 3.6V, Ta= -40 ~ +85C) Symbol Parameter Min. Typ. Max. Unit Condition tDFR FR delay time - 20 80 ns CL = 50 pF (VDD= 1.8 ~ 2.7V, Ta= -40 ~ +85C) Symbol Parameter Min. Typ. Max. Unit Condition tDFR FR delay time - 40 160 ns CL = 50 pF 5. Reset Timing RW
in „[Pollin] Grafik Display Anschluss Verständnisfragen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Attiny24a-44a-84a.pdf
. There are two cases that give a transition without Compare Match. • OCR0A changes its value from MAX, like in Figure 11-7 on page 76. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must
in „Kann jemand über meine Inialisierung drüberfliegen?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
_ATmega32.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „Anschwingvorgang µC & Quarz“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATMega16.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „DCF auf INT0“ · Mikrocontroller und Digitale Elektronik ·