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PDF
STM32_Reference_manual.pdf
Independent LSI RC LSI enable 32 kHz watchdog RTCSEL[1:0] RTC OSC32_IN LSE enable RTCCLK to RTC LSE OSC 32.768 kHz OSC32_OUT SYSCLK MCO2 /1 to 5 HSE_RTC LSE MCO1 Peripheral Ethernet /1 to 5 /2 to 31 clock enable PTP clock 180 MHz max. HCLK to AHB bus, core, 16 MHz HSI Clock memory and DMA HSI RC enable /8 SW
in „STM32F4 Timer Triggered DMA SPI – NSS Problem“ · Mikrocontroller und Digitale Elektronik ·
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PDF
rm0444-stm32g0x1-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
. . . . . . . . . . . 966 Table 173. Examples of TIMEOUTA settings for various I2CCLK frequencies (max t TIMEOUT = 25 ms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 967 Table 174. Examples of TIMEOUTB settings for various I2CCLK frequencies . .
in „Problem mit Clock Configuration beim STM32G031“ · Mikrocontroller und Digitale Elektronik ·
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PDF
NovaComm_Control_Interface_User_Guide_Ver.2.3.pdf
MinInterval Minimum acceptable interval in milliseconds O Value: 0002h—FFFEh; only even values, up to max, are valid Time = MinInterval x 0.625 ms Time Range: 1.25 ms to 40959 ms MaxInterval Maximum acceptable interval in milliseconds O Value: 0004h—FFFEh; only even values, up to max, are valid Time = MaxInterval
in „Mini Bluetooth Module mit SPP und AT Command set“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ili9328.pdf
4.5V ~ 6.0V VGH 10V ~ 20V 6 Liquid Crystal Drive VGL -5V ~ -15V Voltages VCL -2.0V ~ -3.0V VGH - VGL Max. 32V Vci - VCL Max. 6.0V DDVDH Vci1 x2 VGH Vci1 x4, x5, x6 7 Internal Step-up Circuits VGL Vci1 x-3, x-4, x-5 VCL Vci1 x-1 The information contained herein is the exclusive property of ILI Technology
in „VW-Werbebeilage mit Display (vidipri)“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ILI9328DS_V0.1.pdf
4.5V ~ 6.0V VGH 10V ~ 20V 6 Liquid Crystal Drive VGL -5V ~ -15V Voltages VCL -2.0V ~ -3.0V VGH - VGL Max. 32V Vci - VCL Max. 6.0V DDVDH Vci1 x2 VGH Vci1 x4, x5, x6 7 Internal Step-up Circuits VGL Vci1 x-3, x-4, x-5 VCL Vci1 x-1 The information contained herein is the exclusive property of ILI Technology
in „[V]erkaufe TFT 2.8" und TFT 2.4" mit adapter PCB“ · Markt ·
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PDF
PIC16F8X_JP.pdf
͍ɻĝċċçąçûõüĝ ͷͱ͖ɺĊøçĄçĊùçĄçú÷çķčç͕ਪ Clock from OSC1 Ͱ͢ɻ ext. system PIC16FXX ༻ਫথ ā Open OSC2 32.768 kHz Epson C-001R32.768K-A ± 20 PPM 100 kHz Epson C-2 100.00 KC-P ± 20 PPM 200 kHz STD XTL 200.000 KHz ± 20 PPM 1.0 MHz ECS ECS-10-13-2 ± 50 PPM 2.0 MHz ECS ECS-20-S-2 ± 50 PPM 4.0 MHz ECS ECS-40-S-4
in „Denglisch sprechender Kollege“ · Ausbildung, Studium & Beruf ·
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PDF
LGDP4524.pdf
capacitor to each capacitor connection pin. 3. Set the following voltages within the limits: DDVDH = max 5.5V, VCL = min –3.3V, VGH = max 16.5V, VGL = min –16.5V. nd DUAL – Controls the operndion of the 2 step-up circuit 1.This bit can be enablestin only condition DK=1 to prevent the 2 step up circuit
in „LCD farben invertiert normal ?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
GD32VF103_User_Manual_EN_V1.0.pdf
..................................................... 190 20 GD32VF103 User Manual Table 13.1. Min/max FWDGT timeout period at 40 kHz (IRC40K) .......................................................... 203 Table 13.2. Min/max timeout value at 54 MHz (f PCLK1 ) ........................................
in „STM32F103C8T6 => GD32VF103C8T6“ · Mikrocontroller und Digitale Elektronik ·
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PDF
UM_10120_LPC213x_User_Manual.pdf
False External crystal True oscillator used? False MIN OSC= 10 MHz MIN fOSC= 1 MHz MIN OSC= 1 MHz MAX f OSC= 25 MHz MAX f OSC= 50 MHz MAX fOSC= 30 MHz (Figure 7, mode a and/or b) (Figure 7, mode a) (Figure 7, mode b) Fig 8. F OSC selection algorithm © Koninklijke Philips Electronics N.V. 2005. All rights
in „Zeichen im Interrupt empfangen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
UM10120_1.pdf
False External crystal True oscillator used? False MIN OSC= 10 MHz MIN fOSC= 1 MHz MIN OSC= 1 MHz MAX f OSC= 25 MHz MAX f OSC= 50 MHz MAX fOSC= 30 MHz (Figure 7, mode a and/or b) (Figure 7, mode a) (Figure 7, mode b) Fig 8. F OSC selection algorithm © Koninklijke Philips Electronics N.V. 2005. All rights
in „Baudrate Abtastfrequenz“ · Mikrocontroller und Digitale Elektronik ·
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PDF
HD66773.pdf
potentiometer • Output power-supply voltage For the TFT-display counter electrode: Vcom amplitude = 6V (max), VcomH-GND =VREG1OUT (max), VcomL-GND= Vci + 1.0V to –Vci+0.5V (max) • Internal RAM capacity: 46,464 bytes • Internal operation circuit of liquid crystal display Source signal: 396 Gate signal: 176
in „The Siemens S65 132x176, 65536 color display with AVR“ · Projekte & Code ·
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PDF
HD66773.pdf
potentiometer • Output power-supply voltage For the TFT-display counter electrode: Vcom amplitude = 6V (max), VcomH-GND =VREG1OUT (max), VcomL-GND= Vci + 1.0V to –Vci+0.5V (max) • Internal RAM capacity: 46,464 bytes • Internal operation circuit of liquid crystal display Source signal: 396 Gate signal: 176
in „The Siemens S65 132x176, 65536 color display with AVR“ · Projekte & Code ·
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PDF
ILI9325.pdf
4.5V ~ 6.0V VGH 10V ~ 20V 6 Liquid Crystal Drive VGL -5V ~ -15V Voltages VCL -1.9V ~ -3.0V VGH - VGL Max. 32V Vci - VCL Max. 6.0V DDVDH Vci1 x2 7 Internal Step-up Circuits VGH Vci1 x4, x5, x6 VGL Vci1 x-3, x-4, x-5 VCL Vci1 x-1 The information contained herein is the exclusive property of ILI Technology
in „Programmierung von ILI9325 TFT Display“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ILI9325DS_V0.35.pdf
4.5V ~ 6.0V VGH 10V ~ 20V 6 Liquid Crystal Drive VGL -5V ~ -15V Voltages VCL -1.9V ~ -3.0V VGH - VGL Max. 32V Vci - VCL Max. 6.0V DDVDH Vci1 x2 VGH Vci1 x4, x5, x6 7 Internal Step-up Circuits VGL Vci1 x-3, x-4, x-5 VCL Vci1 x-1 The information contained herein is the exclusive property of ILI Technology
in „[V]erkaufe TFT 2.8" und TFT 2.4" mit adapter PCB“ · Markt ·
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PDF
ILI9325DS_V0.28.pdf
4.5V ~ 6.0V VGH 10V ~ 20V 6 Liquid Crystal Drive VGL -5V ~ -15V Voltages VCL -1.9V ~ -3.0V VGH - VGL Max. 32V Vci - VCL Max. 6.0V DDVDH Vci1 x2 7 Internal Step-up Circuits VGH Vci1 x4, x5, x6 VGL Vci1 x-3, x-4, x-5 VCL Vci1 x-1 The information contained herein is the exclusive property of ILI Technology
in „Chinesisches TFT LCD zum Schnäppchenpreis“ · Mikrocontroller und Digitale Elektronik ·
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PDF
DELL_VOSTRO_3300__WIstron_Winery13_MB_DIS_.pdf
Date: Wednesday, January 13, 2010 Sheet 33 of 88 5 4 3 2 1 5 4 3 2 1 SSID = ExpressCard D +1.5V_CARD Max. 650mA, Average 500mA. D +3.3V_CARD Max. 1300mA, Average 1000mA +3.3V_CARDAUX Max. 275mA SB-26 NEW1 27 1 USB12_N 2 USB12_P 3 NEWCARD_OC# TP3401 CPUSB# 4 PM_SLP_S3# [22,37,42,50,51,86] 5 6 [23] PCH_SMB_CLK
in „Bios programmieren mit Dual Bios Main.Bin und EC.Bin ?“ · Softwareentwicklung ·
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PDF
BBK-29LEM-5093T2C_MSD308C-1.pdf
Digital Color system PAL/NTSC/SECAM AV Video 1Vp-p@75ohm Audio 500mV rms HDMI Audio 500mVrms Format Max. 1080P Antenna Impedance 75 Ohm Unbalanced Power Supply Power supply: AC 100V-240V, 50/60Hz Back Panel Viewing TV KEY STANDBY,SOURCE,CH+/CH-, VOL +/-, MENU USB2.0 Socket Front Panel Viewing LED Indicators
in „Datenblatt zu MSH9010-lf gesucht“ · Mikrocontroller und Digitale Elektronik ·
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PDF
harman_kardon_avr507_sm.pdf
890W maximum (7 channels driven) Transient Intermodulation Distortion (TIM) Unmeasurable Dimensions (Max) Width 440mm RiseTime 16µsec Height 165mm Depth 382mm Slew Rate 40V/µsec** Weight 14.0 kg Depth measurement includes knobs, buttons and terminal connections. Height measurement includes feet and chassis
in „Harman Kardon geht nicht an (hängt im Standby fest)“ · Analoge Elektronik und Schaltungstechnik ·
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Datei
DevConfigSMLPE.txt
other.getFInv()); } if (other.getMpptNum() != 0) { setMpptNum(other.getMpptNum()); } if (other.getStrNumMax() != 0) { setStrNumMax(other.getStrNumMax()); } if (other.getPvSampCfg() != 0) { setPvSampCfg(other.getPvSampCfg()); } if (other.getAcMode() != 0) { setAcMode(other.getAcMode()); } if (other.getEsReady
in „Wechselrichter Hoymiles HM-xxxx 2,4 GhZ Nordic Protokoll?“ · Mikrocontroller und Digitale Elektronik ·
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abc.pdf
Zeitgebe r wirksam, so daß die doppelten chen des Zählerstandes Null löst Werte gelten (2 ps bis 32,768 ms ) eine Interruptanmeldung au s rechner sehr regelmäßig ausfüh-- steht. Das Verwenden von P3 1nt- für das serielle Interface (SIO) . ren muß. Dazu gehören die Aus- als Tin (Timer-Input von T1) un
in „DDR-µC, maskenprogrammiert, "fremd verwendbar ?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
harman_kardon_avr145_sm.pdf
5W/F 1 R766 CRD20TF1001T RES , CARBON 1K /1/5W /F 1 R767 CRD20TF1501T RES , CARBON 1.5K /1/5W /F 1 R768 CRD20TF1801T RES , CARBON 1.8K /1/5W /F 1 R769 CRD20TF2701T RES , CARBON 2.7K /1/5W/F 1 Miscellaneous S702 HST1A020ZT SW , TACT 1A020 1 S703 HST1A020ZT SW , TACT 1A020 1 S704 HST1A020ZT SW , TACT 1A020
in „Relais beim AVR 145 von harman/kardon durch SSR ersetzen“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
20120224183241077.pdf
3.60V，Ta=-40℃～+85℃ 13.3.1. Clock Characteristics Table 13-3 Item Symbol Unit Timing Diagram Min. Typ. Max. Note IOVCC = VCC = 3.0V, RC Oscillation clock fosc kHz 25°C 384 427 470 NOTE︰Value of Typ.、Min. and Max. is decided by the setting of Initial Code at Page 61 80-System Bus Interface Timing Characteristics
in „Handydummy (Attrappe)mit richtigem Display - Sony Ericsson Vivaz“ · Mikrocontroller und Digitale Elektronik ·
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C8051F53x.pdf
Clock unless otherwise specified. Typical values are given at 25 °C Parameter Conditions Min. Typ. Max. Units Supply Input Voltage (V )1 Output Current < 1 mA REGIN C8051F52x/53x 2.7 — 5.25 V 1 C8051F52xA/53xA 1.8 — 5.25 V Digital Supply Voltage (V) C8051F52x/53x 2.0 — 2.7 V DD C8051F52xA/53xA 1.8 —
in „[V]erkaufe 35 µC von Silabs C8051F531 (TSSOP-20)“ · Markt ·
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PDF
C8051F531.pdf
Clock unless otherwise specified. Typical values are given at 25 °C Parameter Conditions Min. Typ. Max. Units Supply Input Voltage (V )1 Output Current < 1 mA REGIN C8051F52x/53x 2.7 — 5.25 V 1 C8051F52xA/53xA 1.8 — 5.25 V Digital Supply Voltage (V) C8051F52x/53x 2.0 — 2.7 V DD C8051F52xA/53xA 1.8 —
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PDF
GCC_Tut_Test.pdf
& (1 << pin)) ) 12 { 13 /* Pin wurde auf Masse gezogen , 100ms warten */ 14 _delay_ms(50); // max. 262.1 ms / F_CPU in MHz 15 _delay_ms(50); 16 if ( *port & (1 << pin) ) 17 { 18 /* Anwender Zeit zum Loslassen des Tasters geben */ 19 _delay_ms(50); 20 _delay_ms(50); 21 return 1; 22 } 23 } 24
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user.manual.lpc17xx.pdf
endpoint has space reserved in the EP_RAM. The EP_RAM space required for an endpoint depends on its MaxPacketSize and whether it is double buffered. 32 words of EP_RAM are used by the device for storing the endpoint buffer pointers. The EP_RAM is word aligned but the MaxPacketSize is defined in bytes
in „LPCxpresso 1769 I2C Takt einstellen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
iPhone_4_schem.pdf
R 201005 R24 11RESET_3V0_L 1100K 2 5% 1/32W 1 C264 NOSTUFF 01005 1R9 1000PF 54.9K 10% U2 1% 2 X5RV MAX9061 MF32W 01005 PP3V0_IO B1 UCSP NOSTUFF 2 01005 ** LAYOUT(MLB): TIE TESTMODE PIN UNDER PKG B 14 11 10 6 4 3 2 REF R1 B DOCK_TMS A2 A1 10.00 2 14 2 IN OUT RESET_1V2_L GND 1/32W MF 1 B 01005 R6 11%K
in „iphone 4 smd abgebrochen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
User_guide_-_Driver.pdf
EPIConfigGPModeSet (unsigned long ulBase, unsigned long ulConfig, unsigned long ulFrameCount, unsigned long ulMaxWait) void EPIConfigHB16Set (unsigned long ulBase, unsigned long ulConfig, unsigned long ul- MaxWait) void EPIConfigHB8Set (unsigned long ulBase, unsigned long ulConfig, unsigned long ul- MaxWait) void EPIConfigSDRAMSet
in „PCF8574 mit LM3S8938 per I2C auslesen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
DM00043574.pdf
RM0316 1. The memory asserts the WAIT signal aligned to NOE/NWE which toggles: DATAST ≥ (4 × HCLK) + max_wait_assertion_time 2. The memory asserts the WAIT signal aligned to NEx (or NOE/NWE not toggling): if max_wait_assertion_time > address_phase + hold_phase then: DATAST ≥ (4 × HCLK) + (max_wait_assertion_time
in „STM32F3 Discovery als USB Keyboard“ · Mikrocontroller und Digitale Elektronik ·
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PDF
en.DM00091010.pdf
767 A.14.2 SPI slave configuration code example . . . . . . . . . . . . . . . . . . . . . . . . . 768 A.14.3 SPI full duplex communication code example . . . . . . . . . . . . . . . . . . . 768 A.14.4 SPI interrupt code example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 768 A.14.5 SPI master configuration with DMA code example. . . . . . . . . . . . . . . . 768 A.14.6 SPI slave configuration with DMA code example . . . . . . . . . . . . . . . . . 769 A.15 USART code example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 769 A.15.1
in „EFM32F030 und Standby“ · Mikrocontroller und Digitale Elektronik ·
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PDF
___MPASM_USER_S_GUIDE_with_MPLINK_and_MPLIB.pdf
BufLength=512 ; Init BufLength . ; RecLength may . ; be reset later . ; in RecLength=128 . ; . ; constant MaxMem=RecLength+BufLength ;CalcMaxMem See Also SET VARIABLE DATA – Create Numeric and Text Data Syntax [<label>] data <expr>,[,<expr>,...,<expr>] [<label>] data “<text_string>”[,“<text_string>”,...] Description
in „Anfängerfrage zu Assembler“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Driver_Library_user_guide.pdf
option chosen de- pends entirely on hardware design. The clock input for the module will either be a 32.768 kHz oscillator or a 4.194304 MHz crystal. The ulClockFlags parameter must be one of the following: HIBERNATE_CLOCK_SEL_RAW - use the raw signal from a 32.768 kHz oscillator. HIBERNATE_CLOCK_SEL_DIV128
in „I2C Display Steuern“ · Mikrocontroller und Digitale Elektronik ·
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UserManual_STM32H747_DISCO.pdf
OUT PF15 R202 10K R192 PDR_ON DSI_D1_N DSI_D1_N STM32H747XIH6U 0 [N/A] STM32H747XIH6U X3 NX3215SA-32.768KHZ-EXS00A-MU00525 R191 10K RESET# +3V3 C34 1.5pF R78 R190 [N/A] 0 B1 +3V3 TD-0341 [RESET/Black] 1 2 4 3 D13 2 1 ESDA7P60-1U1M D[0..31] D[0..31] A[0..15] A[0..15] S ULPI_D[0..7] ULPI_D[0..7] c DCMI_D
in „STM32H747-DISCO0 - Demo Sourcecode gesucht“ · Mikrocontroller und Digitale Elektronik ·
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PDF
UMS-21100.pdf
include: a o e P • i.MX21 Multimedia Application Processor l 1 c X • Two clock-source crystals, 32.768 KHz and 26 MHz d i r 0 • Power connector for +5.0-volts in from an external regulated power supply, an in-line fuse, and a d 0 power on/off switch. g r k b • Voltage regulators that step down the 5.0
in „PHILIPS VP5500 VoIP Telefon bei Pollin“ · Mikrocontroller und Digitale Elektronik ·
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PDF
O-Ring_Uebersicht_0304.pdf
6,99 6-1217 131,50 4,00 2-347 107,32 5,33 6-211 119,54 2,65 6-095 132,00 3,00 6-217 107,41 2,66 6-768 119,60 5,70 6-1015 132,00 4,00 2-244 107,54 3,53 6-504 120,00 3,00 2-355 132,72 5,33 2-156 107,62 2,62 6-674 120,00 1,50 2-431 132,72 6,99 2-046 107,67 1,78 6-721 120,00 2,50 2-252 132,94 3,53 6-1106
in „Langlebiges Schmiermittel für O-Ringe in Sanitär-Armaturen“ · Haus & Smart Home ·
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PDF
CH572DS1_en.PDF
Access Description Reset value [7:3] Reserved RO Reserved 0 Long reset duration selection: 11: 32.768ms; [2:1] RB_LONG_TIM_SEL RWA 10: 25.000ms; 0 01: 20.000ms; 00: 15.000ms. Long reset enable: 0 RB_LONG_RST_EN RWA 1: Enable; 0 0: Disable. Sleep Clock Control Register 2 (R8_SLP_CLK_OFF2) Bit Name Access
in „Eagle 7.5 Bibliothek - bitte um Prüfung und Hinweise“ · Platinen ·
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PDF
Ultraschallotrungssystem_Lego_Mindstorms.pdf
Strom 0,4 40 Widerstand ] ]0,3 30 h A k [ d m a t r S0,2 20 d W 0,1 10 0,0 0 0 128 256 384 512 640 768 896 1024 Sensorwert Abbildung 2.9: Sensorwerte, Strom und Widerstand im passiven Modus 2.5 Aktive Sensoren Die passiven Sensoren stoßen schnell an ihre Grenzen. Fur vie¨e Meßaufgaben ist eine zusatzliche
in „Ortung mittels Ultraschall - Projektvorstellung / Hilfegesuch“ · Mikrocontroller und Digitale Elektronik ·
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PDF
mindstorms.pdf
Strom 0,4 40 Widerstand ] ]0,3 30 h A k [ d m a t r S0,2 20 d W 0,1 10 0,0 0 0 128 256 384 512 640 768 896 1024 Sensorwert Abbildung 2.9: Sensorwerte, Strom und Widerstand im passiven Modus 2.5 Aktive Sensoren Die passiven Sensoren stoßen schnell an ihre Grenzen. Fur vie¨e Meßaufgaben ist eine zusatzliche
in „Suche Transreceiver Ultraschallkapseln mit 80° Detektionswinkel“ · Mikrocontroller und Digitale Elektronik ·
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PDF
samsung_242mp_chassis_po24fs.pdf
BroadcastTelevisionSystemCommittee),A2-Korea,EIAJ PALsystem:B/G,I,D/K,L/L' Antenna Input 75Ω, Coaxial Cable 1) MAX Internal speaker Out : 5W(channel) x 2 (output level: 4W ~ 6W) 2) Total Harmonic Distortion : 10% MAX 3) AUDIO S/N : 40dB MIN Sound Characteristic 4) BASS Control Range : -12dB +12dB , TREBLE Control Range : -12dB +12dB 5) Surround mode support 6) Headphone Out : - RF : 5mW max (400m Vrms) - A/V : 10mW max (580 Vrms), Max Input sound : -9dBm 7) Output Frequency - RF : 50Hz 12KHz - A/V : 50Hz 12KHz 8) Max Input Level : 2V 9) standard Audio Input Level :500mVrms 10) CROSSTALK
in „Defekt an Samsung 242MP TV/Monitor“ · Mikrocontroller und Digitale Elektronik ·
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PDF
2_gameboy.pdf
Technical Data CPU - 8-bit (Similar to the Z80 processor) Clock Speed - 4.194304MHz (4.295454MHz for SGB, max. 8.4MHz for CGB) Work RAM - 8K Byte (32K Byte for CGB) Video RAM - 8K Byte (16K Byte for CGB) Screen Size - 2.6" Resolution - 160x144 (20x18 tiles) Max sprites - Max 40 per screen, 10 per line Sprite
in „(Chip8 / gameboy) Emulator für AVR AVR32“ · Mikrocontroller und Digitale Elektronik ·
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PDF
pm2534ocr.pdf
the counter is full (therefore the counter is also presettable for the DOWN-phase to get a defined max. DOWN-timing in case of a fault). When the DOWN-phase is ready, the contents of the counter is transferred to the output shiftregister and the AZ-phase is started. The timing of the AZ~phase is done
in „Pjilips PM2519“ · Markt ·
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Datei
gdb_log.txt
bytes @ address 0x080112D4 (Data = 0xF8DF) 02-00000000-00-00001293-003C: TBA7FC700 001:293 JLINK_SetMaxSpeed() (0001ms, 0777ms total) 02-00000000-00-00001293-0048: TBA7FC700 001:294 JLINK_GetSpeed() returns 0x7D0 (0000ms, 0777ms total) 03-00000000-00-00001293-002D: Select auto target interface speed (
in „Problem mit Breakpoints (Eclipse + JLink)“ · Mikrocontroller und Digitale Elektronik ·
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PDF
STC89C51RC-english.pdf
d i t H i m c L Ge Y U DIMENSIONS IN Seating Plane SYMBOLS DIMENSIONS IN INCH MILLMETERS M MIN NOM MAX MIN NOM MAX A 0.165 - 0.180 4.191 - 4.572 C A1 0.020 - - 0.508 - - S T A2 0.147 - 0.158 3.734 - 4.013 b1 0.026 0.028 0.032 0.660 0.711 0.813 b 0.013 0.017 0.021 0.330 0.432 0.533 c 0.007 0.010 0.0013
in „Einstieg in 8051 - Atmels AT89S52 oder?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
UM1052_PMSM_singledual_FOC_SDK_v3.3.pdf
Figure 21. Figure 21. Circle limitation working principle r * V r V V* q Vq V d V * d r r1 2 1 S16_MAX r MMI S16_MAX 2 ai14845 V dnd V reqresent the saturated stator voltage components to be passed to the Reverse Park transformation function, while V * and V * are the outputs of the PID current d q controllers
in „BLDC Sinuskommutierung Ansteuerung H-Brücke“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
Datasheet_ILI9225DS_V022.pdf
between GND. Place a shottkey diode between Vci. See “Configurations of Power supply circuit”. VGH = max 16.5V An output voltage from the step-up circuit 2, -3 ~ -5 times the Vci1 Stabilizing level. The step-up rate is set with the BT bits. Place a stabilizing VGL O capacitor, capacitor between GND. Place
in „STM32F103 TFT SPI ILI9225“ · Mikrocontroller und Digitale Elektronik ·
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PDF
IEC_60730_Class_B_and_IEC_61508_SIL_Safety_Software_Library.pdf
requirements. The clock test uses the 16-bit timer0 integrated into the WDT and clocked by the 32.768-kHz ILO. The WDT timer0 is a continuous up counting 16-bit timer with overflow. The tests starts by reading the current count of the timer, then waits 1 ms using a software delay, and finally reads
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PDF
io-controller-hub-9-datasheet.pdf
F3) ............ 767 19.2.18NOTIFY_DLOW—Notify Data Low Byte Register (SMBus—D31:F3)............... 768 19.2.19NOTIFY_DHIGH—Notify Data High Byte Register (SMBus—D31:F3)............. 768 20 PCI Express* Configuration Registers.................................................................... 769 20.1
in „FLASH Memory Chip im Lenovo X200 von 8 MB auf 16 MB vergroessern“ · PC Hard- und Software ·
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PDF
4620.pdf
TIME-OUT TOST OST TIME-OUT TPLL PLL TIME-OUT INTERNAL RESET Note: TOST= 1024 clock cycles. TPLL≈ 2 ms max. First three stages of the PWRT timer. 2004 Microchip Technology Inc. Preliminary DS39626B-page 47 PIC18F2525/2620/4525/4620 4.6 Reset State of Registers Table 4-4 describes the Reset states for all
in „SPI master/slave - schreib/lese befehle ?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
HX8340-B_T__DS_preliminary_v01_080313.pdf
is determined by BT3-0 bits. Connect to a capacitor stabilizing capacitor between GND and VGH. VGH=max 15.3V A negative power output from the step-up circuit 2 for the gate line drive circuit. VGL O 1 Stabilizing The step-up rate is determined by BT(3-0)its. Connect to a capacitor stabilizing capacitor
in „SAMMELBESTELLUNG: 2"2 TFT Display mit 16bit digital interface“ · Markt ·
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PDF
DM00031020.pdf
. 767 26.3.8 LIN (local interconnection network) mode . . . . . . . . . . . . . . . . . . . . . . 768 26.3.9 USART synchronous mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 770 26.3.10 Single-wire half-duplex communication . . . . . . . . . . . . . . . . . . . . . . . . 772
in „fsmc am stm32f4“ · Mikrocontroller und Digitale Elektronik ·