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PDF
magnetic.pdf
which has two extreme values along the hysteresis curve Bx,1− B x,2 B x,1− B x,2 µmin = min , and µ max = max . (5.58) H x,1Hx,2H x,1− H x,2 Hx,1,Hx,2H x,1− H x,2 Hereµ min andµ max aretheminimumandmaximumslopeofthehysteresischaracteristics. The inequality µmin ≤ µ ≤ µ max (5.59) is obvious, from which
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PDF
HAL_STM32F1.pdf
_7: Select max triangle amplitude of 7 – DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15 – DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31 – DAC_TRIANGLEAMPLITUDE_63: Select max triangle
in „CAN auf STM32F4“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Dr.Arbeit_H-Bruecken.1455549.pdf
Therefore, as shown in Fig. 7.14, the B6-bridge and CHB inverter’s voltage ripples are at D = 0.5 and V DC,max /2 and V batt,max2, respectively. The maximal peak current ripple on the inductor ∆I is set at 5% of the peak current. L,max Considering the battery maximal current of I batt,max= 36A, the current ripple
in „DIY 10kW/20kWh eta=99% Insel ESS Projektvorstellung“ · Haus & Smart Home ·
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PDF
ILI9341_DS_V1.09.pdf
...................................................................................................187 8.3.24. Positive Gamma Correction (E0h).....................................................................................188 8.3.25. Negative Gamma Correction (E1h)...............................
in „Ansteuerung LCD ILI9341“ · Mikrocontroller und Digitale Elektronik ·
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PDF
c8051f32x.pdf
Modes.................................................................................................187 16.5.1. Master Transmitter Mode ....................................................................................187 16.5.2. Master Receiver Mode..................................................
in „Drehwinkelmessung“ · Mikrocontroller und Digitale Elektronik ·
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PDF
nRF24LE1_Product_Specification_rev1_6-6439.pdf
TX_DS 1: Interrupt not reflected on the RFIRQ 0: Reflect TX_DS as active low interrupt on RFIRQ MASK_MAX_RT 4 0 R/W Mask interrupt caused by MAX_RT 1: Interrupt not reflected on RFIRQ 0: Reflect MAX_RT as active low on RFIRQ EN_CRC 3 1 R/W Enable CRC. Forced high if one of the bits in the EN_AA is high
in „Projekt: Kugelschreiber-Morse“ · Mikrocontroller und Digitale Elektronik ·
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PDF
_ATmega32.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „Anschwingvorgang µC & Quarz“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATMega16.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „DCF auf INT0“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ilm1-2007000172.pdf
Frequenzen, bei denen die Phasenverschiebung des Filters gleich die maximale Phasenverschiebung ϕ BP max ist, ergeben sich aus Gl.(5.13) als: tan(ϕ ) 2 tan(ϕ ) ω 1 = ω m2 + BPmax − BP max T1 T 1 2 ω = ω 2 + tan(ϕ BPmax ) + tan(ϕ BP max) 2 m T1 T 1 Sensorlose Regelung der permanenterregten Synchron¨aschine
in „SVPWM Ansteuerung eines BLDC“ · Mikrocontroller und Digitale Elektronik ·
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PDF
lg_lh-cx245_cx246_cx247_cx640__1_.pdf
- 20,000 Hz 50 - 1,500 Hz Sound Pressure Level 85 dB/W (1m) 82 dB/W (1m) Rated Input Power 25W 60W Max Input Power 50W 120W Net Dimensions (W x H x D) 90x138.5x100mm 160x350x345mm Net Weight 0.9 kg 4.5 kg 1-7 Amplifier(LH-CX246) Stereo mode 25W+25W(6ohmat1kHz,THD10%) Surround mode Front: 25W + 25W (THD
in „Netzteil von LG LH-C360 defekt“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
LTC6803-2_4.pdf
specifications are at A = 25°C. V = 43.2V, V = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS – VREF Reference Pin Voltage RLOAD = 100k to V 3.020 3.065 3.110 V l 3.015 3.065 3.115 V Reference Voltage Temperature 8 ppm/°C Coefficient Reference Voltage Thermal Hysteresis 25°C to 85°C and
in „uC für Schaltregler“ · Mikrocontroller und Digitale Elektronik ·
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PDF
neocapacitor_e.pdf
F/PS ● Substrate terminal structure ● Fillet perceivable after soldering G/PS on PWB ● Height 1.0mmMax P.29 - 31 NeoCapacitor®is manufactured in the factory certified international , ISO 14001”and“IATF 16949”. 5 ˔"MM▯TQFDJGJDBUJPOT▯JO▯UIJT▯DBUBMPH▯BOE▯QSPEVDUJPO▯TUBUVT▯PG▯QSPEVDUT▯BSF▯TVCKFDU▯UP▯DIBOHF
in „Kennt jemand dieses Bauteil?“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
ml50x_schematics.pdf
Debug PWR Page 25-26 D Mictor, Trace Jack SofTouch Diff SMA Clocks Page 9 Page 11 Switcher 5.0V@10A max Optional GPIO Linear USER Clock 0.9V@1.4A max Page 10 Page 9 Switcher 3.3V@10A max Glock DVI Generator Linear Codec Page 15 2.5V@3A max Page 9 Conn Page 16 2.5V@3A maxCAUX Linear Flash Video In Page 20 Codec Page 17 Linear MGT PLL 1.2V@3A max Virtex 5 C LXT / SXT / FXT C Linear - MGT AVTT RX ZBT SRAM AC97 1.2V@3A max Page 2-6 Audio Page 20 Page 18 Switcher 1.8V@10A max Platform FLASH IIC Linear - MGT AVCC EEPROM 1.0V@3.0A max Page 8 Page
in „DDR2 RAM Ansteuerung mit Virtex-5 ML507“ · FPGA, VHDL & Co. ·
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PDF
AT90CAN128.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 12
in „Umrechnen von analog to digital“ · Mikrocontroller und Digitale Elektronik ·
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PDF
BE-412-B-MONITOR-HEIDENHAIN-MANUAL.pdf
ERR: 185 Sektor nicht auffindbar (z.B. unformatierte Diskette soll beschrieben werden) ERR: 106 RRR: 187 Elektronischer Fehler in der FE ERR: lB8 SERVICEANLEITUNG TNC351/355 HEIDENHAIN Blatt 54 0-8225 Tramreut ‘Tel. (08669) 31-0 Kundendienst 11.6.3 Fehlermeldungen an der HE In der MEwerden Prüfungen der
in „CRT Monitor gegen VGA Monitor tauschen“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
AtMega644P_Datasheet.pdf
TOM. There are two cases that give a transition without Compare Match. OCR0A changes its value from MAX, like in Figure 13-7. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must correspond
in „Alkoholmessgerät programmieren“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Datasheet_ATmega1281_doc2549.pdf
TOM. There are two cases that give a transition without Compare Match. OCR0A changes its value from MAX, like in Figure 16-7. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must correspond
in „LM73 über TWI/I2C mit Atmega1281 auslesen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
atmega644.pdf
TOM. There are two cases that give a transition without Compare Match. OCR0A changes its value from MAX, like in Figure 13-7. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must correspond
in „SPI-Kommunikation Atmega644 - ADS1118“ · Mikrocontroller und Digitale Elektronik ·
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PDF
0901.3482v1.pdf
meta-gadget must be used together with a specially- which is located above the BSS section and below the max crafted stack, referred to as the fake stack in the rest of this value of the stack pointer, is unaffected by reboots and the section. This fake stack contains the gadget variables (such as ADDR ; tMe
in „Mikrocontroller Viren“ · Offtopic ·
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PDF
S1D13513.pdf
FPDRDY 182 79 MEMA1 FPLINE 78 183 MEMA0 FPFRAME 184 FPSHIFT 77 185 VSS 76 AB20 VSS 186 AB19 HVDD2 75 187 74 AB18 FPDAT0 188 AB17 FPDAT1 73 189 72 AB16 FPDAT2 190 AB15 FPDAT3 71 191 70 AB14 FPDAT4 192 AB13 FPDAT5 69 193 68 AB12 FPDAT6 67 194 AB11 FPDAT7 195 VSS 66 196 AB10 65 HVDD1 HVDD2 197 VSS FPDAT8
in „S1D113513 + AT91RM9200“ · Mikrocontroller und Digitale Elektronik ·
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PDF
311_Schaltungen.pdf
-Treiber-Elektronik die Sende-Stufe mit einer Art Tristate-Modus abschalten können. Beim bekannten MAX232 geht das leider nicht, dafür aber bei den Typen ICL3321 und MAX242. Tx: cmd arg0 arg1 ... argX/n Rx: cmd arg0 arg1 ... argX/n Beide verfügen über Low-Power-Shut- replyline1/n down-Modi, die sogar
in „[S] Sammlung von elektr. Schaltungen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
doc7707.pdf
TOM. There are two cases that give a transition without Compare Match. OCR0A changes its value from MAX, like in Figure 14-7. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must correspond
in „AVR (AT90USB162) - Sleep Mode und PCINT“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Frequenznutzungsplan2011pdf.pdf
von meteorologischen Daten bedingungen: Maximal zulässige äquivalente Strahlungsleistung: 100 mW bis max. 10 km Aufstiegshöhe 300 mW bis max. 30 km Aufstiegshöhe Kanalraster: 20 kHz / 200 kHz © Bundesnetzagentur Frequenznutzungsplan Frequenznutzungsteilplan: 218 Eintrag: 218001 Stand: AUGUST 2011 Frequenzbereich
in „Interessante Frequenzen zwischen 100KHz und 2GHz“ · HF, Funk und Felder ·
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PDF
AT90CAN128.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 12
in „uC + 3 Schieberegister + 7-Segmentanzeige“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Attiny24a-44a-84a.pdf
. There are two cases that give a transition without Compare Match. • OCR0A changes its value from MAX, like in Figure 11-7 on page 76. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must
in „Kann jemand über meine Inialisierung drüberfliegen?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
KS0073.pdf
character reverse display • Display shift per line • Voltage converter for LCD drive voltage : 13 V max (2 times / 3 times) • Various instruction functions • Automatic power on reset FEATURES • Internal Memory - Character Generator ROM (CGROM) : 9,600 bits (24 0 characters × 5 × 8 dot) - Character Generator
in „Eigene Zeichen bei LCD mit KS0073 für blöde“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ISD1700_Design_Guide.pdf
secs 150 secs 180 secs 210 secs 240 secs 6.4 kHz 37 secs 50 secs 62 secs 75 secs 112 secs 150 secs 187 secs 225 secs 262 secs 300 secs 5.3 kHz 45 secs 60 secs 75 secs 90 secs 135 secs 181 secs 226 secs 271 secs 317 secs 362 secs 4 kHz 60 secs 80 secs 100 secs 120 secs 180 secs 240 secs 300 secs 360 secs
in „Verständnisfrage ISD1700 Statusbits“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ssd1803a.pdf
Generator RAM (CGRAM): 64 x 8 bits (8 characters) Display Data RAM (DDRAM): 80 x 8 bits (80 characters max.) o Segment Icon RAM (SEGRAM): 16 x 8 bits (96 icons max.) • 1, 2, 3 or 4 lines with 5x8 or 6x8 dots format display SSD1803A Rev 2.0 P 7/69 May 2011 Solomon Systech 5-dot font width Display Line Single-chip
in „Probleme mit EADOGM204-4 und ATMEGA32“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ssd1803a_2_0.pdf
Generator RAM (CGRAM): 64 x 8 bits (8 characters) Display Data RAM (DDRAM): 80 x 8 bits (80 characters max.) o Segment Icon RAM (SEGRAM): 16 x 8 bits (96 icons max.) • 1, 2, 3 or 4 lines with 5x8 or 6x8 dots format display SSD1803A Rev 2.0 P 7/69 May 2011 Solomon Systech 5-dot font width Display Line Single-chip
in „Display DOGM-204A/SSD1803A mit I2C - ROM Auswahl“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PIC18Fxx2.pdf
that can be configured as: In-Circuit Debug (ICD) via two pins - Capture input: capture is 16-bit, max. resolution 6.25 ns (CY /16) CMOS Technology: - Compare is 16-bit, max. resolution 100 nsCY) Low power, high speed FLASH/EEPROM - PWM output: PWM resolution is 1- to 10-bit, technology max. PWM freq
in „AD1 und AD2 Multiplexen (PIC18F452)“ · Mikrocontroller und Digitale Elektronik ·
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Datei
Report_Samsung_X20.htm
GS Wavetable SW Synth <TR><TD><TD><TD>mixer.0 <TD CLASS=cc>FFFF FFFF <TD>SoundMAX Digital Audio <TR><TD><TD><TD>wave-in.0 <TD CLASS=cc>FFFF FFFF <TD>SoundMAX Digital Audio <TR><TD><TD><TD>wave-out.0 <TD CLASS=cc>FFFF FFFF <TD>SoundMAX Digital
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PDF
Eagle_DataSheet_V2.8_english.pdf
2-10 FF/AF/EF/AE Property Settings FIFO attribute name Description Setting range FF Full flag 1 to Max AF Almost full 1 to Full-1 AE Almost empty 1 to Full-1 EF Empty setting 0 Common configuration in FIFO mode The CSW/CSR in FIFO mode is similar to the CSA/CSB interface logic in RAM mode. To avoid
in „Sipeed Lichee Tang FPGA mit RISC-V Core aus China unter 20€“ · FPGA, VHDL & Co. ·
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PDF
KlangPlusTon_2007-01.pdf
6HW (für eine Box, ohne Gehäuse) - 2½ - Wege –System - Impedanz 4 Ohm - 140 Watt R.M.S. - 350 Watt max. NEW l i i e s n d AWX 184 n ▯▯▯▯▯▯¼ w n A - Nachfolger des Ravemaster BSW 184-II - 18” Subwoofer-Chassis AWX 184 - massiver Aluminium- Impedanz 4 Ohm Druckgusskorb X max +/- 5,0 mm - Doppelzentrierung
in „Symasym hohe Ausgangsspannung“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
Eagle_DataSheet_V2.8_english.pdf
2-10 FF/AF/EF/AE Property Settings FIFO attribute name Description Setting range FF Full flag 1 to Max AF Almost full 1 to Full-1 AE Almost empty 1 to Full-1 EF Empty setting 0 Common configuration in FIFO mode The CSW/CSR in FIFO mode is similar to the CSA/CSB interface logic in RAM mode. To avoid
in „SDRAM Burst lesen ohne Unterbrechung über Column, Row und Banks hinaus“ · FPGA, VHDL & Co. ·
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PDF
atmel-8393-mcu_wireless-atmega256rfr2-atmega128rfr2-atmega64rfr2_datasheet.pdf
address. 9.12.50 XAH_CTRL_0 – Transceiver Extended Operating Mode Control Register Bit 7 6 NA ($16C) MAX_FRAME_RETRIES3 MAX_FRAME_RETRIES2 XAH_CTRL_0 Read/Write RW RW Initial Value 0 0 Bit 5 4 NA ($16C) MAX_FRAME_RETRIES1 MAX_FRAME_RETRIES0 XAH_CTRL_0 Read/Write RW RW Initial Value 1 1 Bit 3 2 NA ($16C) MAX_CSMA_RETRIES2 MAX_CSMA_RETRIES1 XAH_CTRL_0 Read/Write RW RW Initial Value 1 0 Bit 1 0 NA ($16C) MAX_CSMA_RETRIES0 SLOTTED_OPERATION XAH_CTRL_0 Read/Write RW RW Initial Value 0 0 This register is used
in „AVR-Verlustleistung maximieren“ · Mikrocontroller und Digitale Elektronik ·
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PDF
HX8340-B_T__DS_preliminary_v01_080313.pdf
is determined by BT3-0 bits. Connect to a capacitor stabilizing capacitor between GND and VGH. VGH=max 15.3V A negative power output from the step-up circuit 2 for the gate line drive circuit. VGL O 1 Stabilizing The step-up rate is determined by BT(3-0)its. Connect to a capacitor stabilizing capacitor
in „SAMMELBESTELLUNG: 2"2 TFT Display mit 16bit digital interface“ · Markt ·
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PDF
AT90PWM2_2B_3_3B__2_.pdf
TOM. There are two cases that give a transition without Compare Match. OCRnx changes its value from MAX, like in Figure 14-7. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCnx value at MAX must correspond
in „Interrupt bem Flankenwechsel beim AVR“ · Mikrocontroller und Digitale Elektronik ·
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PDF
at90pwm3.pdf
TOM. There are two cases that give a transition without Compare Match. OCRnx changes its value from MAX, like in Figure 14-7. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCnx value at MAX must correspond
in „Schrittmotorsteuerung mir 90atPWM3“ · Mikrocontroller und Digitale Elektronik ·
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Datei
clk_wiz_0.xml
xilinx:parameterInfo> </spirit:vendorExtensions> </spirit:parameter> <spirit:parameter> <spirit:name>MAX_BURST_LENGTH</spirit:name> <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_LITE.MAX_BURST_LENGTH">1</spirit:value> <spirit:vendorExtensions> <xilinx:parameterInfo
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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Datei
clk_wiz_0.xml
xilinx:parameterInfo> </spirit:vendorExtensions> </spirit:parameter> <spirit:parameter> <spirit:name>MAX_BURST_LENGTH</spirit:name> <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_LITE.MAX_BURST_LENGTH">1</spirit:value> <spirit:vendorExtensions> <xilinx:parameterInfo
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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Datei
clk_wiz_0.xml
xilinx:parameterInfo> </spirit:vendorExtensions> </spirit:parameter> <spirit:parameter> <spirit:name>MAX_BURST_LENGTH</spirit:name> <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_LITE.MAX_BURST_LENGTH">1</spirit:value> <spirit:vendorExtensions> <xilinx:parameterInfo
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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Datei
clk_wiz_0.xml
xilinx:parameterInfo> </spirit:vendorExtensions> </spirit:parameter> <spirit:parameter> <spirit:name>MAX_BURST_LENGTH</spirit:name> <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_LITE.MAX_BURST_LENGTH">1</spirit:value> <spirit:vendorExtensions> <xilinx:parameterInfo
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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PDF
doc7593.pdf
TOM. There are two cases that give a transition without Compare Match. OCR0A changes its value from MAX, like in Figure 13-7. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must correspond
in „Problem mit dem TC4469“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATMega_48_88_168.pdf
of TOV Flag Mode WGM02 WGM01 WGM00 Operation TOP OCRx at Set on(1)(2) 0 0 0 0 Normal 0xFF Immediate MAX 1 0 0 1 PWM, Phase 0xFF TOP BOTTOM Correct 2 0 1 0 CTC OCRA Immediate MAX 3 0 1 1 Fast PWM 0xFF TOP MAX 97 2545B–AVR–01/04 Table 51. Waveform Generation Mode Bit Description (Continued) Timer/Count
in „I2C/TWI TWBR > 10 warum?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ST7789V.pdf
On..................................................................................................187 9.1.17 GAMSET (26h): Gamma Set..............................................................................................................189 9.1.18 DISPOFF (28h): Display Off.....................
in „LilyGo T-Watch 2020 v1 Micropython“ · Mikrocontroller und Digitale Elektronik ·
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PDF
lsm6dsl.pdf
Table 7. I C slave timing values I C standard mode (1) I C fast mode (1) Symbol Parameter Unit Min Max Min Max (SCL) SCL clock frequency 0 100 0 400 kHz tw(SCLL) SCL clock low time 4.7 1.3 μs tw(SCLH) SCL clock high time 4.0 0.6 t SDA setup time 250 100 ns su(SDA) th(SDA) SDA data hold time 0 3.45 0
in „LSM6DSL Gyro+Accelerometer, Gyro gibt keine Werte aus.“ · Mikrocontroller und Digitale Elektronik ·
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Datei
main.lss.txt
81 e0 ldi r24, 0x01 ; 1 174: 80 93 78 00 sts 0x0078, r24 break; 178: 08 95 ret case USBASP_ISP_SCK_187_5: /* enable SPI, master, 187.5kHz XTAL/64 */ sck_spcr = (1 << SPE) | (1 << MSTR) | (1 << SPR1); 17a: 82 e5 ldi r24, 0x52 ; 82 17c: 01 c0 rjmp .+2 ; 0x180 <ispSetSCKOption+0x54> break; case USBASP_ISP_SCK
in „2 Programme in einem AVR“ · Mikrocontroller und Digitale Elektronik ·
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PDF
EM6126_DS.pdf
required capacitor: 1μF on V LCD, 100nF on VDD1,2and V HV Parameter Symbol Test conditions Min. Typ. Max. Units Supply Current Sleep mode IDD T A 25°C, Sleep = 1 100 nA Sleep mode IHV T A 25°C, Sleep = 1 0.8 μA Normal LCD refresh mode IDD T A 25°C, (note 1) 17 22 μA Normal LCD refresh mode IHV T A 25°C
in „LCD mit SPI ansteuern“ · Mikrocontroller und Digitale Elektronik ·
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PDF
dokserv.pdf
läßt sich daraus unmittelbar der Zusammenhang zwischen der maximal zu kodierenden Signalfrequenz fs,max und den Größen Signalamplitude A , Impulsamplitude A und Taktfrequenz f angeben: s p 0 45 4 Vollständig digitale Realisierung der DDS Ap s,max~ f0⋅ (4.5) As Gl. (4.5) zeigt, daß die maximal zu kodierende
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PDF
Yaskawa-SGDB-xxADx-x-TSE-S800-16E.pdf
Apply the holding brake at the same time as the Servo ON. * 2 The mechanical contact takes 180 ms max. to be opened when the brake is turned ON and 100 ms max. to be closed when turned OFF. * 3 Allow 200 ms or more between the moment when the brake is turned ON and when the speed reference is input.